Home | History | Annotate | Download | only in mips64
      1 /*
      2  * Copyright (C) 2014 The Android Open Source Project
      3  *
      4  * Licensed under the Apache License, Version 2.0 (the "License");
      5  * you may not use this file except in compliance with the License.
      6  * You may obtain a copy of the License at
      7  *
      8  *      http://www.apache.org/licenses/LICENSE-2.0
      9  *
     10  * Unless required by applicable law or agreed to in writing, software
     11  * distributed under the License is distributed on an "AS IS" BASIS,
     12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
     13  * See the License for the specific language governing permissions and
     14  * limitations under the License.
     15  */
     16 
     17 #ifndef ART_COMPILER_UTILS_MIPS64_CONSTANTS_MIPS64_H_
     18 #define ART_COMPILER_UTILS_MIPS64_CONSTANTS_MIPS64_H_
     19 
     20 #include <iosfwd>
     21 
     22 #include "arch/mips64/registers_mips64.h"
     23 #include "base/logging.h"
     24 #include "base/macros.h"
     25 #include "globals.h"
     26 
     27 namespace art {
     28 namespace mips64 {
     29 
     30 // Constants used for the decoding or encoding of the individual fields of instructions.
     31 enum InstructionFields {
     32   kOpcodeShift = 26,
     33   kOpcodeBits = 6,
     34   kRsShift = 21,
     35   kRsBits = 5,
     36   kRtShift = 16,
     37   kRtBits = 5,
     38   kRdShift = 11,
     39   kRdBits = 5,
     40   kShamtShift = 6,
     41   kShamtBits = 5,
     42   kFunctShift = 0,
     43   kFunctBits = 6,
     44 
     45   kFmtShift = 21,
     46   kFmtBits = 5,
     47   kFtShift = 16,
     48   kFtBits = 5,
     49   kFsShift = 11,
     50   kFsBits = 5,
     51   kFdShift = 6,
     52   kFdBits = 5,
     53 
     54   kMsaOperationShift = 23,
     55   kMsaELMOperationShift = 22,
     56   kMsa2ROperationShift = 18,
     57   kMsa2RFOperationShift = 17,
     58   kDfShift = 21,
     59   kDfMShift = 16,
     60   kDf2RShift = 16,
     61   kDfNShift = 16,
     62   kWtShift = 16,
     63   kWtBits = 5,
     64   kWsShift = 11,
     65   kWsBits = 5,
     66   kWdShift = 6,
     67   kWdBits = 5,
     68   kS10Shift = 16,
     69   kI10Shift = 11,
     70   kS10MinorShift = 2,
     71 
     72   kBranchOffsetMask = 0x0000ffff,
     73   kJumpOffsetMask = 0x03ffffff,
     74   kMsaMajorOpcode = 0x1e,
     75   kMsaDfMByteMask = 0x70,
     76   kMsaDfMHalfwordMask = 0x60,
     77   kMsaDfMWordMask = 0x40,
     78   kMsaDfMDoublewordMask = 0x00,
     79   kMsaDfNByteMask = 0x00,
     80   kMsaDfNHalfwordMask = 0x20,
     81   kMsaDfNWordMask = 0x30,
     82   kMsaDfNDoublewordMask = 0x38,
     83   kMsaS10Mask = 0x3ff,
     84 };
     85 
     86 enum ScaleFactor {
     87   TIMES_1 = 0,
     88   TIMES_2 = 1,
     89   TIMES_4 = 2,
     90   TIMES_8 = 3
     91 };
     92 
     93 class Instr {
     94  public:
     95   static const uint32_t kBreakPointInstruction = 0x0000000D;
     96 
     97   bool IsBreakPoint() {
     98     return ((*reinterpret_cast<const uint32_t*>(this)) & 0xFC00003F) == kBreakPointInstruction;
     99   }
    100 
    101   // Instructions are read out of a code stream. The only way to get a
    102   // reference to an instruction is to convert a pointer. There is no way
    103   // to allocate or create instances of class Instr.
    104   // Use the At(pc) function to create references to Instr.
    105   static Instr* At(uintptr_t pc) { return reinterpret_cast<Instr*>(pc); }
    106 
    107  private:
    108   DISALLOW_IMPLICIT_CONSTRUCTORS(Instr);
    109 };
    110 
    111 }  // namespace mips64
    112 }  // namespace art
    113 
    114 #endif  // ART_COMPILER_UTILS_MIPS64_CONSTANTS_MIPS64_H_
    115