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      1 /*++
      2 
      3   Copyright (c) 2004  - 2014, Intel Corporation. All rights reserved.<BR>
      4 
      5   This program and the accompanying materials are licensed and made available under
      7   the terms and conditions of the BSD License that accompanies this distribution.
      9   The full text of the license may be found at
     11   http://opensource.org/licenses/bsd-license.php.
     13 
     15   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
     17   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
     19 
     21 
     23 Module Name:
     24 
     25   SlotConfig.c
     26 
     27 Abstract:
     28 
     29   Sets platform/SKU specific expansion slot information.
     30 
     31 
     32 
     33 
     34 --*/
     35 
     36 #include "PlatformDxe.h"
     37 #include <Protocol/SmbiosSlotPopulation.h>
     38 #include <IndustryStandard/Pci22.h>
     39 
     40 
     41 //
     42 // Default bus number for the bridge
     43 //
     44 #define DEF_BUS_CONFIG  0x0101
     45 #define DEF_BUS         0x01
     46 
     47 //
     48 // Data structures for slot information
     49 //
     50 typedef struct {
     51   UINT16  SmbiosSlotId;
     52   UINT8   Bus;
     53   UINT8   Dev;
     54   UINT8   Function;
     55   UINT8   TargetDevice;
     56 } EFI_PCI_SLOT_BRIDGE_INFO;
     57 
     58 //
     59 // Product specific bridge to slot routing information
     60 //
     61 EFI_PCI_SLOT_BRIDGE_INFO mSlotBridgeTable[] = {
     62   {
     63     0x01,             //PCIe x1 ICH (Bridge B0:D28:F1)
     64     DEFAULT_PCI_BUS_NUMBER_PCH,
     65     PCI_DEVICE_NUMBER_PCH_PCIE_ROOT_PORTS,
     66     PCI_FUNCTION_NUMBER_PCH_PCIE_ROOT_PORT_2,
     67     0
     68   }
     69 };
     70 
     71 UINTN mSlotBridgeTableSize =
     72   sizeof(mSlotBridgeTable) / sizeof(EFI_PCI_SLOT_BRIDGE_INFO);
     73 
     74 //
     75 // Slot entry table for IBX RVP
     76 //
     77 EFI_SMBIOS_SLOT_ENTRY mSlotEntries[] = {
     78   {0x06, FALSE, TRUE},    // PCIe x16 Slot 1 (NOT USED)
     79   {0x04, FALSE, TRUE},    // PCIe x16 Slot 2 (NOT USED)
     80   {0x03, FALSE, TRUE},    // PCIe x4 Slot (NOT USED)
     81   {0x02, FALSE, FALSE},   // Mini PCIe x1 Slot
     82   {0x15, FALSE, TRUE},    // PCIe x1 Slot 2 (NOT USED)
     83   {0x16, FALSE, TRUE},    // PCIe x1 Slot 3 (NOT USED)
     84   {0x07, FALSE, FALSE},   // PCI Slot 1
     85   {0x18, FALSE, TRUE},    // PCI Slot 2 (NOT USED)
     86   {0x17, FALSE, TRUE},    // PCI Slot 3 (NOT USED)
     87 };
     88 
     89 EFI_SMBIOS_SLOT_POPULATION_INFO mSlotInformation = {
     90   sizeof(mSlotEntries) / sizeof(EFI_SMBIOS_SLOT_ENTRY),
     91   mSlotEntries
     92 };
     93 
     94 
     95