1 /* 2 * Copyright (C) 2014 The Android Open Source Project 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 17 #ifndef ART_RUNTIME_ARCH_MIPS_INSTRUCTION_SET_FEATURES_MIPS_H_ 18 #define ART_RUNTIME_ARCH_MIPS_INSTRUCTION_SET_FEATURES_MIPS_H_ 19 20 #include "arch/instruction_set_features.h" 21 #include "base/logging.h" 22 #include "base/macros.h" 23 24 namespace art { 25 26 class MipsInstructionSetFeatures; 27 using MipsFeaturesUniquePtr = std::unique_ptr<const MipsInstructionSetFeatures>; 28 29 // Instruction set features relevant to the MIPS architecture. 30 class MipsInstructionSetFeatures FINAL : public InstructionSetFeatures { 31 public: 32 // Process a CPU variant string like "r4000" and create InstructionSetFeatures. 33 static MipsFeaturesUniquePtr FromVariant(const std::string& variant, std::string* error_msg); 34 35 // Parse a bitmap and create an InstructionSetFeatures. 36 static MipsFeaturesUniquePtr FromBitmap(uint32_t bitmap); 37 38 // Turn C pre-processor #defines into the equivalent instruction set features. 39 static MipsFeaturesUniquePtr FromCppDefines(); 40 41 // Process /proc/cpuinfo and use kRuntimeISA to produce InstructionSetFeatures. 42 static MipsFeaturesUniquePtr FromCpuInfo(); 43 44 // Process the auxiliary vector AT_HWCAP entry and use kRuntimeISA to produce 45 // InstructionSetFeatures. 46 static MipsFeaturesUniquePtr FromHwcap(); 47 48 // Use assembly tests of the current runtime (ie kRuntimeISA) to determine the 49 // InstructionSetFeatures. This works around kernel bugs in AT_HWCAP and /proc/cpuinfo. 50 static MipsFeaturesUniquePtr FromAssembly(); 51 52 bool Equals(const InstructionSetFeatures* other) const OVERRIDE; 53 54 InstructionSet GetInstructionSet() const OVERRIDE { 55 return kMips; 56 } 57 58 uint32_t AsBitmap() const OVERRIDE; 59 60 std::string GetFeatureString() const OVERRIDE; 61 62 // Is this an ISA revision greater than 2 opening up new opcodes. 63 bool IsMipsIsaRevGreaterThanEqual2() const { 64 return mips_isa_gte2_; 65 } 66 67 // Floating point double registers are encoded differently based on whether the Status.FR bit is 68 // set. When the FR bit is 0 then the FPU is 32-bit, 1 its 64-bit. Return true if the code should 69 // be generated assuming Status.FR is 0. 70 bool Is32BitFloatingPoint() const { 71 return fpu_32bit_; 72 } 73 74 bool IsR6() const { 75 return r6_; 76 } 77 78 virtual ~MipsInstructionSetFeatures() {} 79 80 protected: 81 // Parse a vector of the form "fpu32", "mips2" adding these to a new MipsInstructionSetFeatures. 82 std::unique_ptr<const InstructionSetFeatures> 83 AddFeaturesFromSplitString(const std::vector<std::string>& features, 84 std::string* error_msg) const OVERRIDE; 85 86 private: 87 MipsInstructionSetFeatures(bool fpu_32bit, bool mips_isa_gte2, bool r6) 88 : InstructionSetFeatures(), 89 fpu_32bit_(fpu_32bit), 90 mips_isa_gte2_(mips_isa_gte2), 91 r6_(r6) { 92 // Sanity checks. 93 if (r6) { 94 CHECK(mips_isa_gte2); 95 CHECK(!fpu_32bit); 96 } 97 if (!mips_isa_gte2) { 98 CHECK(fpu_32bit); 99 } 100 } 101 102 // Bitmap positions for encoding features as a bitmap. 103 enum { 104 kFpu32Bitfield = 1 << 0, 105 kIsaRevGte2Bitfield = 1 << 1, 106 kR6 = 1 << 2, 107 }; 108 109 const bool fpu_32bit_; 110 const bool mips_isa_gte2_; 111 const bool r6_; 112 113 DISALLOW_COPY_AND_ASSIGN(MipsInstructionSetFeatures); 114 }; 115 116 } // namespace art 117 118 #endif // ART_RUNTIME_ARCH_MIPS_INSTRUCTION_SET_FEATURES_MIPS_H_ 119