1 /** @file 2 ArmGicArchLib library class implementation for DT based virt platforms 3 4 Copyright (c) 2015, Linaro Ltd. All rights reserved.<BR> 5 6 This program and the accompanying materials 7 are licensed and made available under the terms and conditions of the BSD License 8 which accompanies this distribution. The full text of the license may be found at 9 http://opensource.org/licenses/bsd-license.php 10 11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 13 14 **/ 15 16 #include <Base.h> 17 18 #include <Library/ArmGicLib.h> 19 #include <Library/ArmGicArchLib.h> 20 #include <Library/PcdLib.h> 21 #include <Library/DebugLib.h> 22 23 STATIC ARM_GIC_ARCH_REVISION mGicArchRevision; 24 25 RETURN_STATUS 26 EFIAPI 27 ArmVirtGicArchLibConstructor ( 28 VOID 29 ) 30 { 31 UINT32 IccSre; 32 33 switch (PcdGet32 (PcdArmGicRevision)) { 34 35 case 3: 36 // 37 // The default implementation of ArmGicArchLib is responsible for enabling 38 // the system register interface on the GICv3 if one is found. So let's do 39 // the same here. 40 // 41 IccSre = ArmGicV3GetControlSystemRegisterEnable (); 42 if (!(IccSre & ICC_SRE_EL2_SRE)) { 43 ArmGicV3SetControlSystemRegisterEnable (IccSre | ICC_SRE_EL2_SRE); 44 IccSre = ArmGicV3GetControlSystemRegisterEnable (); 45 } 46 47 // 48 // Unlike the default implementation, there is no fall through to GICv2 49 // mode if this GICv3 cannot be driven in native mode due to the fact 50 // that the System Register interface is unavailable. 51 // 52 ASSERT (IccSre & ICC_SRE_EL2_SRE); 53 54 mGicArchRevision = ARM_GIC_ARCH_REVISION_3; 55 break; 56 57 case 2: 58 mGicArchRevision = ARM_GIC_ARCH_REVISION_2; 59 break; 60 61 default: 62 DEBUG ((EFI_D_ERROR, "%a: No GIC revision specified!\n", __FUNCTION__)); 63 return RETURN_NOT_FOUND; 64 } 65 return RETURN_SUCCESS; 66 } 67 68 ARM_GIC_ARCH_REVISION 69 EFIAPI 70 ArmGicGetSupportedArchRevision ( 71 VOID 72 ) 73 { 74 return mGicArchRevision; 75 } 76
