| /external/swiftshader/third_party/LLVM/lib/Target/ |
| TargetInstrInfo.cpp | 49 TargetInstrInfo::getNumMicroOps(const InstrItineraryData *ItinData,
51 if (!ItinData || ItinData->isEmpty())
55 unsigned UOps = ItinData->Itineraries[Class].NumMicroOps;
65 TargetInstrInfo::getOperandLatency(const InstrItineraryData *ItinData,
68 if (!ItinData || ItinData->isEmpty())
73 return ItinData->getOperandLatency(DefClass, DefIdx, UseClass, UseIdx);
77 TargetInstrInfo::getOperandLatency(const InstrItineraryData *ItinData,
80 if (!ItinData || ItinData->isEmpty()
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMHazardRecognizer.h | 35 ARMHazardRecognizer(const InstrItineraryData *ItinData,
37 : ScoreboardHazardRecognizer(ItinData, DAG, "post-RA-sched"),
|
| ARMBaseInstrInfo.h | 278 unsigned getNumMicroOps(const InstrItineraryData *ItinData,
281 int getOperandLatency(const InstrItineraryData *ItinData,
285 int getOperandLatency(const InstrItineraryData *ItinData,
306 int getVLDMDefCycle(const InstrItineraryData *ItinData,
310 int getLDMDefCycle(const InstrItineraryData *ItinData,
314 int getVSTMUseCycle(const InstrItineraryData *ItinData,
318 int getSTMUseCycle(const InstrItineraryData *ItinData,
322 int getOperandLatency(const InstrItineraryData *ItinData,
328 int getOperandLatencyImpl(const InstrItineraryData *ItinData,
337 unsigned getInstrLatency(const InstrItineraryData *ItinData,
[all...] |
| ARMBaseInstrInfo.cpp | [all...] |
| /external/llvm/lib/CodeGen/ |
| ScoreboardHazardRecognizer.cpp | 31 : ScheduleHazardRecognizer(), DebugType(ParentDebugType), ItinData(II),
38 if (ItinData && !ItinData->isEmpty()) {
40 if (ItinData->isEndMarker(idx))
43 const InstrStage *IS = ItinData->beginStage(idx);
44 const InstrStage *E = ItinData->endStage(idx);
72 IssueWidth = ItinData->SchedModel.IssueWidth;
111 if (!ItinData || ItinData->isEmpty())
126 for (const InstrStage *IS = ItinData->beginStage(idx)
[all...] |
| TargetInstrInfo.cpp | [all...] |
| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| ScoreboardHazardRecognizer.cpp | 35 ScheduleHazardRecognizer(), ItinData(II), DAG(SchedDAG), IssueWidth(0),
46 if (ItinData && !ItinData->isEmpty()) {
47 IssueWidth = ItinData->IssueWidth;
50 if (ItinData->isEndMarker(idx))
53 const InstrStage *IS = ItinData->beginStage(idx);
54 const InstrStage *E = ItinData->endStage(idx);
109 if (!ItinData || ItinData->isEmpty())
124 for (const InstrStage *IS = ItinData->beginStage(idx)
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| ARMHazardRecognizer.h | 37 ARMHazardRecognizer(const InstrItineraryData *ItinData,
42 ScoreboardHazardRecognizer(ItinData, DAG, "post-RA-sched"), TII(tii),
|
| ARMBaseInstrInfo.h | 204 virtual unsigned getNumMicroOps(const InstrItineraryData *ItinData,
208 int getOperandLatency(const InstrItineraryData *ItinData,
212 int getOperandLatency(const InstrItineraryData *ItinData,
222 int getVLDMDefCycle(const InstrItineraryData *ItinData,
226 int getLDMDefCycle(const InstrItineraryData *ItinData,
230 int getVSTMUseCycle(const InstrItineraryData *ItinData,
234 int getSTMUseCycle(const InstrItineraryData *ItinData,
238 int getOperandLatency(const InstrItineraryData *ItinData,
244 int getInstrLatency(const InstrItineraryData *ItinData,
247 int getInstrLatency(const InstrItineraryData *ItinData,
[all...] |
| ARMBaseInstrInfo.cpp | [all...] |
| /external/swiftshader/third_party/LLVM/utils/TableGen/ |
| SubtargetEmitter.h | 39 Record *ItinData, std::string &ItinString,
41 void FormItineraryOperandCycleString(Record *ItinData, std::string &ItinString,
44 Record *ItinData,
|
| SubtargetEmitter.cpp | 211 Record *ItinData,
216 ItinData->getValueAsListOfDefs("Stages");
255 void SubtargetEmitter::FormItineraryOperandCycleString(Record *ItinData,
259 ItinData->getValueAsListOfInts("OperandCycles");
273 Record *ItinData,
277 ItinData->getValueAsListOfDefs("Bypasses");
375 Record *ItinData = ItinDataList[j];
380 FormItineraryStageString(Name, ItinData, ItinStageString, NStages);
385 FormItineraryOperandCycleString(ItinData, ItinOperandCycleString,
389 FormItineraryBypassString(Name, ItinData, ItinBypassString
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| ScoreboardHazardRecognizer.h | 91 const InstrItineraryData *ItinData;
105 ScoreboardHazardRecognizer(const InstrItineraryData *ItinData,
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCHazardRecognizers.h | 35 PPCDispatchGroupSBHazardRecognizer(const InstrItineraryData *ItinData,
37 ScoreboardHazardRecognizer(ItinData, DAG_), DAG(DAG_),
|
| PPCInstrInfo.h | 114 unsigned getInstrLatency(const InstrItineraryData *ItinData,
118 int getOperandLatency(const InstrItineraryData *ItinData,
122 int getOperandLatency(const InstrItineraryData *ItinData,
125 return PPCGenInstrInfo::getOperandLatency(ItinData, DefNode, DefIdx,
|
| PPCInstrInfo.cpp | 111 unsigned PPCInstrInfo::getInstrLatency(const InstrItineraryData *ItinData,
114 if (!ItinData || UseOldLatencyCalc)
115 return PPCGenInstrInfo::getInstrLatency(ItinData, MI, PredCost);
131 int Cycle = ItinData->getOperandCycle(DefClass, i);
141 int PPCInstrInfo::getOperandLatency(const InstrItineraryData *ItinData,
145 int Latency = PPCGenInstrInfo::getOperandLatency(ItinData, DefMI, DefIdx,
167 Latency = getInstrLatency(ItinData, DefMI);
[all...] |
| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| ScoreboardHazardRecognizer.h | 94 const InstrItineraryData *ItinData;
108 ScoreboardHazardRecognizer(const InstrItineraryData *ItinData,
|
| /external/swiftshader/third_party/LLVM/include/llvm/Target/ |
| TargetInstrInfo.h | 627 virtual unsigned getNumMicroOps(const InstrItineraryData *ItinData,
643 virtual int getOperandLatency(const InstrItineraryData *ItinData,
647 virtual int getOperandLatency(const InstrItineraryData *ItinData,
654 virtual int getInstrLatency(const InstrItineraryData *ItinData,
658 virtual int getInstrLatency(const InstrItineraryData *ItinData,
671 bool hasHighOperandLatency(const InstrItineraryData *ItinData,
[all...] |
| /external/mesa3d/src/gallium/drivers/radeon/ |
| R600InstrInfo.h | 106 int getInstrLatency(const InstrItineraryData *ItinData,
110 virtual int getInstrLatency(const InstrItineraryData *ItinData,
|
| /external/llvm/utils/TableGen/ |
| SubtargetEmitter.cpp | 76 Record *ItinData, std::string &ItinString,
78 void FormItineraryOperandCycleString(Record *ItinData, std::string &ItinString,
81 Record *ItinData,
274 Record *ItinData,
279 ItinData->getValueAsListOfDefs("Stages");
318 void SubtargetEmitter::FormItineraryOperandCycleString(Record *ItinData,
322 ItinData->getValueAsListOfInts("OperandCycles");
336 Record *ItinData,
340 ItinData->getValueAsListOfDefs("Bypasses");
439 Record *ItinData = ProcModel.ItinDefList[SchedClassIdx]
[all...] |
| DFAPacketizerEmitter.cpp | 137 Record *ItinData,
740 Record *ItinData,
743 ItinData->getValueAsListOfDefs("Stages");
748 DEBUG(dbgs() << " " << ItinData->getValueAsDef("TheClass")->getName()
819 Record *ItinData = ItinDataList[j];
821 FUNameToBitsMap, ItinData, OS);
[all...] |
| /external/llvm/include/llvm/Target/ |
| TargetInstrInfo.h | [all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| R600InstrInfo.h | 205 unsigned int getInstrLatency(const InstrItineraryData *ItinData,
209 int getInstrLatency(const InstrItineraryData *ItinData,
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonInstrInfo.h | 256 unsigned getInstrLatency(const InstrItineraryData *ItinData,
397 unsigned getInstrTimingClassLatency(const InstrItineraryData *ItinData,
|
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| X86InstrInfo.h | 356 bool hasHighOperandLatency(const InstrItineraryData *ItinData,
|
