1 /* 2 * Copyright (c) 2014-2015, Linaro Ltd and Contributors. All rights reserved. 3 * Copyright (c) 2014-2015, Hisilicon Ltd and Contributors. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are met: 7 * 8 * Redistributions of source code must retain the above copyright notice, this 9 * list of conditions and the following disclaimer. 10 * 11 * Redistributions in binary form must reproduce the above copyright notice, 12 * this list of conditions and the following disclaimer in the documentation 13 * and/or other materials provided with the distribution. 14 * 15 * Neither the name of ARM nor the names of its contributors may be used 16 * to endorse or promote products derived from this software without specific 17 * prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 23 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #ifndef __HI6553_H__ 33 #define __HI6553_H__ 34 35 #define DISABLE6_XO_CLK 0x036 36 37 #define DISABLE6_XO_CLK_BB (1 << 0) 38 #define DISABLE6_XO_CLK_CONN (1 << 1) 39 #define DISABLE6_XO_CLK_NFC (1 << 2) 40 #define DISABLE6_XO_CLK_RF1 (1 << 3) 41 #define DISABLE6_XO_CLK_RF2 (1 << 4) 42 43 #define VERSION_REG 0x000 44 #define ENABLE2_LDO1_8 0x029 45 #define DISABLE2_LDO1_8 0x02a 46 #define ONOFF_STATUS2_LDO1_8 0x02b 47 #define ENABLE3_LDO9_16 0x02c 48 #define DISABLE3_LDO9_16 0x02d 49 #define ONOFF_STATUS3_LDO9_16 0x02e 50 #define ENABLE4_LDO17_22 0x02f 51 #define DISABLE4_LDO17_22 0x030 52 #define ONOFF_STATUS4_LDO17_22 0x031 53 #define PERI_EN_MARK 0x040 54 #define BUCK2_REG1 0x04a 55 #define BUCK2_REG5 0x04e 56 #define BUCK2_REG6 0x04f 57 #define BUCK3_REG3 0x054 58 #define BUCK3_REG5 0x056 59 #define BUCK3_REG6 0x057 60 #define BUCK4_REG2 0x05b 61 #define BUCK4_REG5 0x05e 62 #define BUCK4_REG6 0x05f 63 #define CLK_TOP0 0x063 64 #define CLK_TOP3 0x066 65 #define CLK_TOP4 0x067 66 #define VSET_BUCK2_ADJ 0x06d 67 #define VSET_BUCK3_ADJ 0x06e 68 #define LDO7_REG_ADJ 0x078 69 #define LDO10_REG_ADJ 0x07b 70 #define LDO15_REG_ADJ 0x080 71 #define LDO19_REG_ADJ 0x084 72 #define LDO20_REG_ADJ 0x085 73 #define LDO22_REG_ADJ 0x087 74 #define DR_LED_CTRL 0x098 75 #define DR_OUT_CTRL 0x099 76 #define DR3_ISET 0x09a 77 #define DR3_START_DEL 0x09b 78 #define DR4_ISET 0x09c 79 #define DR4_START_DEL 0x09d 80 #define DR345_TIM_CONF0 0x0a0 81 #define NP_REG_ADJ1 0x0be 82 #define NP_REG_CHG 0x0c0 83 #define BUCK01_CTRL2 0x0d9 84 #define BUCK0_CTRL1 0x0dd 85 #define BUCK0_CTRL5 0x0e1 86 #define BUCK0_CTRL7 0x0e3 87 #define BUCK1_CTRL1 0x0e8 88 #define BUCK1_CTRL5 0x0ec 89 #define BUCK1_CTRL7 0x0ef 90 #define CLK19M2_600_586_EN 0x0fe 91 92 #define LED_START_DELAY_TIME 0x00 93 #define LED_ELEC_VALUE 0x07 94 #define LED_LIGHT_TIME 0xf0 95 #define LED_GREEN_ENABLE (1 << 1) 96 #define LED_OUT_CTRL 0x00 97 98 #define PMU_HI6552_V300 0x30 99 #define PMU_HI6552_V310 0x31 100 101 extern unsigned char hi6553_read_8(unsigned int offset); 102 extern void hi6553_write_8(unsigned int offset, unsigned int value); 103 104 #endif /* __HI6553_H__ */ 105
