1 //===-- GCNHazardRecognizers.h - GCN Hazard Recognizers ---------*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file defines hazard recognizers for scheduling on GCN processors. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef LLVM_LIB_TARGET_AMDGPUHAZARDRECOGNIZERS_H 15 #define LLVM_LIB_TARGET_AMDGPUHAZARDRECOGNIZERS_H 16 17 #include "llvm/ADT/STLExtras.h" 18 #include "llvm/CodeGen/ScheduleHazardRecognizer.h" 19 #include <list> 20 21 namespace llvm { 22 23 class MachineFunction; 24 class MachineInstr; 25 class ScheduleDAG; 26 class SIInstrInfo; 27 class SISubtarget; 28 29 class GCNHazardRecognizer final : public ScheduleHazardRecognizer { 30 // This variable stores the instruction that has been emitted this cycle. It 31 // will be added to EmittedInstrs, when AdvanceCycle() or RecedeCycle() is 32 // called. 33 MachineInstr *CurrCycleInstr; 34 std::list<MachineInstr*> EmittedInstrs; 35 const MachineFunction &MF; 36 const SISubtarget &ST; 37 38 int getWaitStatesSinceDef(unsigned Reg, 39 function_ref<bool(MachineInstr *)> IsHazardDef = 40 [](MachineInstr *) { return true; }); 41 42 int checkSMEMSoftClauseHazards(MachineInstr *SMEM); 43 int checkSMRDHazards(MachineInstr *SMRD); 44 int checkVMEMHazards(MachineInstr* VMEM); 45 int checkDPPHazards(MachineInstr *DPP); 46 public: 47 GCNHazardRecognizer(const MachineFunction &MF); 48 // We can only issue one instruction per cycle. 49 bool atIssueLimit() const override { return true; } 50 void EmitInstruction(SUnit *SU) override; 51 void EmitInstruction(MachineInstr *MI) override; 52 HazardType getHazardType(SUnit *SU, int Stalls) override; 53 void EmitNoop() override; 54 unsigned PreEmitNoops(SUnit *SU) override; 55 unsigned PreEmitNoops(MachineInstr *) override; 56 void AdvanceCycle() override; 57 void RecedeCycle() override; 58 }; 59 60 } // end namespace llvm 61 62 #endif //LLVM_LIB_TARGET_AMDGPUHAZARDRECOGNIZERS_H 63
