| /external/mesa3d/src/gallium/state_trackers/vega/ |
| asm_fill.h | 260 ureg_writemask(temp[1], TGSI_WRITEMASK_W),
270 ureg_writemask(temp[0], TGSI_WRITEMASK_W),
373 ureg_ADD(ureg, ureg_writemask(out, TGSI_WRITEMASK_W),
540 ureg_MUL(ureg, ureg_writemask(temp[0], TGSI_WRITEMASK_W),
598 ureg_writemask(temp[0], TGSI_WRITEMASK_W),
|
| /external/mesa3d/src/gallium/auxiliary/tgsi/ |
| tgsi_util.c | 298 read_mask |= TGSI_WRITEMASK_W;
|
| tgsi_exec.c | 589 writemask == TGSI_WRITEMASK_W ||
[all...] |
| tgsi_dump.c | 201 if (writemask & TGSI_WRITEMASK_W)
|
| tgsi_text.c | 360 *writemask |= TGSI_WRITEMASK_W;
[all...] |
| /external/mesa3d/src/gallium/auxiliary/vl/ |
| vl_compositor.c | 111 ureg_RCP(shader, ureg_writemask(o_vtop, TGSI_WRITEMASK_W),
119 ureg_RCP(shader, ureg_writemask(o_vbottom, TGSI_WRITEMASK_W),
157 ureg_MOV(shader, ureg_writemask(texel, TGSI_WRITEMASK_W), ureg_imm1f(shader, 1.0f));
162 ureg_MOV(shader, ureg_writemask(fragment, TGSI_WRITEMASK_W), ureg_imm1f(shader, 1.0f));
207 ureg_MOV(shader, ureg_writemask(t_tc[i], TGSI_WRITEMASK_W),
246 ureg_MOV(shader, ureg_writemask(t_texel[0], TGSI_WRITEMASK_W), ureg_imm1f(shader, 1.0f));
250 ureg_MOV(shader, ureg_writemask(o_fragment, TGSI_WRITEMASK_W), ureg_imm1f(shader, 1.0f));
294 ureg_MOV(shader, ureg_writemask(fragment, TGSI_WRITEMASK_W), ureg_src(texel));
[all...] |
| vl_idct.c | 236 ureg_MUL(shader, ureg_writemask(m[0][0], TGSI_WRITEMASK_W), ureg_abs(ureg_src(m[7][1])), ureg_imm1f(shader, 1 << 14));
240 ureg_CMP(shader, ureg_writemask(m[0][0], TGSI_WRITEMASK_W), ureg_negate(ureg_src(m[0][0])),
242 ureg_MUL(shader, ureg_writemask(m[0][0], TGSI_WRITEMASK_W), ureg_src(m[0][0]),
246 ureg_ADD(shader, ureg_writemask(fragment, TGSI_WRITEMASK_W), ureg_src(m[0][0]), ureg_src(m[7][1]));
|
| vl_mc.c | 197 ureg_CMP(shader, ureg_writemask(fragment, TGSI_WRITEMASK_W),
272 ureg_MOV(shader, ureg_writemask(o_flags, TGSI_WRITEMASK_W), ureg_imm1f(shader, -1.0f));
293 ureg_CMP(shader, ureg_writemask(o_flags, TGSI_WRITEMASK_W),
359 ureg_MOV(shader, ureg_writemask(fragment, TGSI_WRITEMASK_W), ureg_imm1f(shader, 1.0f));
|
| vl_zscan.c | 146 ureg_FLR(shader, ureg_writemask(tmp, TGSI_WRITEMASK_W), ureg_src(tmp));
157 ureg_MUL(shader, ureg_writemask(o_vtex[i], TGSI_WRITEMASK_W), ureg_src(tmp),
|
| /external/mesa3d/src/gallium/drivers/llvmpipe/ |
| lp_setup_point.c | 196 if (usage_mask & TGSI_WRITEMASK_W) {
224 fragcoord_usage_mask |= TGSI_WRITEMASK_W;
|
| lp_setup_line.c | 155 if (usage_mask & TGSI_WRITEMASK_W) {
201 fragcoord_usage_mask |= TGSI_WRITEMASK_W;
|
| lp_bld_interp.c | 319 assert(bld->mask[0] & TGSI_WRITEMASK_W);
518 assert(bld->mask[0] & TGSI_WRITEMASK_W);
642 assert(bld->mask[0] & TGSI_WRITEMASK_W);
|
| lp_state_fs.c | [all...] |
| /external/mesa3d/src/gallium/drivers/i915/ |
| i915_fpc_optimize.c | 83 if ( write_mask & TGSI_WRITEMASK_W && r->Register.SwizzleW != TGSI_SWIZZLE_W)
142 if ( write_mask & TGSI_WRITEMASK_W )
|
| i915_fpc_translate.c | 340 if (writeMask & TGSI_WRITEMASK_W)
[all...] |
| /external/mesa3d/src/gallium/include/pipe/ |
| p_shader_tokens.h | 93 #define TGSI_WRITEMASK_W 0x08
|
| /external/mesa3d/src/gallium/auxiliary/gallivm/ |
| lp_bld_tgsi_info.c | 147 readmask |= TGSI_WRITEMASK_W;
|
| /external/mesa3d/src/gallium/auxiliary/draw/ |
| draw_pipe_aapoint.c | 379 newInst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_W;
416 newInst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_W;
462 newInst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_W;
|
| draw_pipe_aaline.c | 310 newInst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_W;
|
| /external/mesa3d/src/gallium/state_trackers/xorg/ |
| xorg_exa_tgsi.c | 376 ureg_MOV(ureg, ureg_writemask(rgb, TGSI_WRITEMASK_W),
429 ureg_writemask(tmp1, TGSI_WRITEMASK_W),
449 ureg_writemask(dst, TGSI_WRITEMASK_W),
|
| /external/mesa3d/src/gallium/drivers/svga/ |
| svga_tgsi_insn.c | [all...] |
| /external/mesa3d/src/gallium/state_trackers/xa/ |
| xa_tgsi.c | 404 ureg_writemask(tmp1, TGSI_WRITEMASK_W),
424 ureg_writemask(dst, TGSI_WRITEMASK_W),
|
| /external/mesa3d/src/gallium/state_trackers/d3d1x/gd3d1x/ |
| sm4_to_tgsi.cpp | 477 ureg_MOV(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_W), ureg_swizzle(_src(4), 0, 0, 0, 0));
|
| /external/mesa3d/src/gallium/drivers/nv30/ |
| nvfx_fragprog.c | 435 if (tgsi & TGSI_WRITEMASK_W) mask |= NVFX_FP_MASK_W;
[all...] |
| nvfx_vertprog.c | 453 if (tgsi & TGSI_WRITEMASK_W) mask |= NVFX_VP_MASK_W;
[all...] |
