/device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/EdkIIGlueLib/Library/BaseLib/Ia32/ |
ReadCr0.c | 24 mov eax, cr0
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WriteCr0.c | 25 mov cr0, eax
local
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DisablePaging32.c | 36 mov eax, cr0
39 mov cr0, eax
local
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EnablePaging32.c | 36 mov eax, cr0
39 mov cr0, eax
local
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/device/linaro/bootloader/edk2/MdePkg/Library/BaseLib/Ia32/ |
ReadCr0.c | 19 Reads the current value of the Control Register 0 (CR0).
21 Reads and returns the current value of CR0. This function is only available
25 @return The value of the Control Register 0 (CR0).
35 mov eax, cr0
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DisableCache.c | 16 Set CD bit and clear NW bit of CR0 followed by a WBINVD.
18 Disables the caches by setting the CD bit of CR0 to 1, clearing the NW bit of CR0 to 0,
29 mov eax, cr0
32 mov cr0, eax
local
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EnableCache.c | 16 Perform a WBINVD and clear both the CD and NW bits of CR0.
19 bits of CR0 to 0. This function is only available on IA-32 and x64.
30 mov eax, cr0
33 mov cr0, eax
local
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WriteCr0.c | 16 Writes a value to Control Register 0 (CR0).
18 Writes and returns a new value to CR0. This function is only available on
21 @param Value The value to write to CR0.
23 @return The value written to CR0.
34 mov cr0, eax
local
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DisablePaging32.c | 32 3) CR0, CR3, and CR4 must be compatible with 32-bit paged mode.
66 mov eax, cr0
69 mov cr0, eax
local
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EnablePaging32.c | 20 Enables the 32-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables
34 3) CR0 and CR4 must be compatible with 32-bit protected mode with flat
69 mov eax, cr0
72 mov cr0, eax
local
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/external/syslinux/com32/lib/sys/i386/ |
x86_init_fpu.c | 13 asm("movl %%cr0,%0":"=r"(v)); 19 asm volatile ("movl %0,%%cr0"::"r" (v)); 36 uint32_t cr0; local 40 cr0 = get_cr0(); 41 cr0 &= ~(CR0_EM | CR0_TS); 42 cr0 |= CR0_MP; 43 set_cr0(cr0);
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/external/syslinux/com32/lib/sys/x86_64/ |
x86_init_fpu.c | 13 asm("movq %%cr0,%0":"=r"(v)); 19 asm volatile ("movq %0,%%cr0"::"r" ((uint64_t)v)); 36 uint32_t cr0; local 40 cr0 = get_cr0(); 41 cr0 &= ~(CR0_EM | CR0_TS); 42 cr0 |= CR0_MP; 43 set_cr0(cr0);
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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/ppc/ |
vle-simple-2.s | 14 e_beql cr0, target1 26 e_bgt cr0, target0 34 e_blel cr0, target4 44 e_bnel cr0, target5 57 e_bns cr0, target2 65 e_bnul cr0, target3 70 e_bsol cr0, target8 73 e_btl cr0, target5
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/external/syslinux/com32/lib/sys/ |
x86_init_fpu.c | 22 asm("movl %%cr0,%0":"=r"(v)); 25 asm("movq %%cr0,%0":"=r"(v)); 35 asm volatile ("movl %0,%%cr0"::"r" (v)); 37 asm volatile ("movq %0,%%cr0"::"r" ((uint64_t)v)); 57 uint32_t cr0; 61 cr0 = get_cr0(); 62 cr0 &= ~(CR0_EM | CR0_TS); 63 cr0 |= CR0_MP; 64 set_cr0(cr0);
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/external/slf4j/slf4j-migrator/src/main/java/org/slf4j/migrator/line/ |
JCLRuleSet.java | 43 SingleConversionRule cr0 = new SingleConversionRule(Pattern.compile("import\\s*+org.apache.commons.logging.LogFactory;"), local 58 conversionRuleList.add(cr0);
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/external/syslinux/efi/x86_64/ |
linux.S | 40 movl %cr0, %eax 42 movl %eax, %cr0
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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
reg-alias.d | 7 0+0 <.*> ee060f10 mcr 15, 0, r0, cr6, cr0, \{0\}
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/development/ndk/platforms/android-9/arch-x86/include/asm/ |
irqflags_32.h | 32 #define GET_CR0_INTO_EAX movl %cr0, %eax
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/prebuilts/ndk/r10/platforms/android-12/arch-x86/usr/include/asm/ |
irqflags_32.h | 32 #define GET_CR0_INTO_EAX movl %cr0, %eax
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/prebuilts/ndk/r10/platforms/android-13/arch-x86/usr/include/asm/ |
irqflags_32.h | 32 #define GET_CR0_INTO_EAX movl %cr0, %eax
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/prebuilts/ndk/r10/platforms/android-14/arch-x86/usr/include/asm/ |
irqflags_32.h | 32 #define GET_CR0_INTO_EAX movl %cr0, %eax
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/prebuilts/ndk/r10/platforms/android-15/arch-x86/usr/include/asm/ |
irqflags_32.h | 32 #define GET_CR0_INTO_EAX movl %cr0, %eax
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/prebuilts/ndk/r10/platforms/android-16/arch-x86/usr/include/asm/ |
irqflags_32.h | 32 #define GET_CR0_INTO_EAX movl %cr0, %eax
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/prebuilts/ndk/r10/platforms/android-17/arch-x86/usr/include/asm/ |
irqflags_32.h | 32 #define GET_CR0_INTO_EAX movl %cr0, %eax
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/prebuilts/ndk/r10/platforms/android-18/arch-x86/usr/include/asm/ |
irqflags_32.h | 32 #define GET_CR0_INTO_EAX movl %cr0, %eax
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