| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
| micromips-insn32.d | 124 [ 0-9a-f]+: 4043 fffe bgez v1,[0-9a-f]+ <.*\+0x[0-9a-f]+>
130 [ 0-9a-f]+: 4044 fffe bgez a0,[0-9a-f]+ <.*>
136 [ 0-9a-f]+: 4042 fffe bgez v0,[0-9a-f]+ <.*>
142 [ 0-9a-f]+: 4042 fffe bgez v0,[0-9a-f]+ <.*>
[all...] |
| micromips-noinsn32.d | 124 [ 0-9a-f]+: 4043 fffe bgez v1,[0-9a-f]+ <.*\+0x[0-9a-f]+>
130 [ 0-9a-f]+: 4044 fffe bgez a0,[0-9a-f]+ <.*>
136 [ 0-9a-f]+: 4042 fffe bgez v0,[0-9a-f]+ <.*>
142 [ 0-9a-f]+: 4042 fffe bgez v0,[0-9a-f]+ <.*>
[all...] |
| micromips.d | 136 [ 0-9a-f]+: 4043 fffe bgez v1,[0-9a-f]+ <.*\+0x[0-9a-f]+>
142 [ 0-9a-f]+: 4044 fffe bgez a0,[0-9a-f]+ <.*>
148 [ 0-9a-f]+: 4042 fffe bgez v0,[0-9a-f]+ <.*>
154 [ 0-9a-f]+: 4042 fffe bgez v0,[0-9a-f]+ <.*>
[all...] |
| /art/compiler/utils/mips/ |
| assembler_mips.cc | 811 void MipsAssembler::Bgez(Register rt, uint16_t imm16) {
[all...] |
| assembler_mips32r6_test.cc | 909 // AssemblerMIPS32r6Test.Bgez
|
| assembler_mips_test.cc | [all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsInstrInfo.td | [all...] |
| MicroMipsInstrInfo.td | [all...] |
| Mips64InstrInfo.td | 238 def BGEZ64 : CBranchZero<"bgez", brtarget, setge, GPR64Opnd>, BGEZ_FM<1, 1>;
[all...] |
| /external/valgrind/VEX/priv/ |
| host_mips_defs.c | [all...] |
| /external/libvpx/libvpx/third_party/libyuv/source/ |
| row_mips.cc | 488 "bgez $t5, 2b \n"
[all...] |
| /external/llvm/test/MC/Disassembler/Mips/mips32/ |
| valid-mips32.txt | 103 0x04 0xc1 0x01 0x4c # CHECK: bgez $6, 1332
|
| /external/llvm/test/MC/Disassembler/Mips/mips32r2/ |
| valid-mips32r2.txt | 108 0x04 0xc1 0x01 0x4c # CHECK: bgez $6, 1332
|
| /external/llvm/test/MC/Disassembler/Mips/mips32r3/ |
| valid-mips32r3.txt | 105 0x04 0xc1 0x01 0x4c # CHECK: bgez $6, 1332
|
| /external/llvm/test/MC/Disassembler/Mips/mips32r5/ |
| valid-mips32r5.txt | 105 0x04 0xc1 0x01 0x4c # CHECK: bgez $6, 1332
|
| /external/llvm/test/MC/Disassembler/Mips/mips64/ |
| valid-mips64.txt | 145 0x04 0xc1 0x01 0x4c # CHECK: bgez $6, 1332
|
| /toolchain/binutils/binutils-2.25/gas/config/ |
| tc-mips.c | [all...] |
| /toolchain/binutils/binutils-2.25/opcodes/ |
| m32r-opc.c | 318 /* bgez $src2,$disp16 */
[all...] |
| tilepro-opc.c | 1149 { "bgez", TILEPRO_OPC_BGEZ, 0x2, 2, TREG_ZERO, 1,
1168 { "bgez.sn", TILEPRO_OPC_BGEZ_SN, 0x2, 2, TREG_SN, 1,
[all...] |
| /toolchain/binutils/binutils-2.25/cpu/ |
| m32r.cpu | 944 (cbranch bgez "bgez" OP2_11 ge)
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/tilegx/ |
| t_insns.d | 97 2b8: [0-9a-f]* { moveli r5, 4660 ; bgez r15, 0 <target> }
128 3b0: [0-9a-f]* { infol 4660 ; bgez r15, 0 <target> }
189 598: [0-9a-f]* { bfexts r5, r6, 5, 7 ; bgez r15, 0 <target> }
190 5a0: [0-9a-f]* { fsingle_mul1 r5, r6, r7 ; bgez r15, 0 <target> }
191 5a8: [0-9a-f]* { revbits r5, r6 ; bgez r15, 0 <target> }
192 5b0: [0-9a-f]* { v1cmpltu r5, r6, r7 ; bgez r15, 0 <target> }
193 5b8: [0-9a-f]* { v2cmpeqi r5, r6, 5 ; bgez r15, 0 <target> }
194 5c0: [0-9a-f]* { v4int_l r5, r6, r7 ; bgez r15, 0 <target> }
[all...] |
| t_insns.s | 122 { moveli r5, 0x1234 ; bgez r15, target }
153 { infol 0x1234 ; bgez r15, target }
214 { bgez r15, target ; bfexts r5, r6, 5, 7 }
215 { bgez r15, target ; fsingle_mul1 r5, r6, r7 }
216 { bgez r15, target ; revbits r5, r6 }
217 { bgez r15, target ; v1cmpltu r5, r6, r7 }
218 { bgez r15, target ; v2cmpeqi r5, r6, 5 }
219 { bgez r15, target ; v4int_l r5, r6, r7 }
[all...] |
| /external/llvm/lib/Target/Mips/AsmParser/ |
| MipsAsmParser.cpp | [all...] |
| /external/libjpeg-turbo/simd/ |
| jsimd_mips_dspr2.S | 86 bgez t9, 0b
122 bgez t9, 4b
[all...] |
| /external/llvm/test/MC/Disassembler/Mips/mips64r2/ |
| valid-mips64r2.txt | 159 0x04 0xc1 0x01 0x4c # CHECK: bgez $6, 1332
|
