| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Compatibility/SmmBaseHelper/ |
| SmramProfileRecord.c | 81 if ((PcdGet8 (PcdMemoryProfilePropertyMask) & BIT1) == 0) {
140 if ((PcdGet8 (PcdMemoryProfilePropertyMask) & BIT1) == 0) {
|
| /device/linaro/bootloader/edk2/OvmfPkg/Include/IndustryStandard/ |
| Virtio.h | 138 #define VRING_DESC_F_WRITE BIT1 // buffer to be written *by the host*
163 #define VSTAT_DRIVER BIT1
|
| VirtioScsi.h | 46 #define VIRTIO_SCSI_F_HOTPLUG BIT1
|
| /device/linaro/bootloader/OpenPlatformPkg/Chips/TexasInstruments/Omap35xx/Include/Omap3530/ |
| Omap3530Interrupt.h | 45 #define INTCPS_CONTROL_NEWFIQAGR BIT1
|
| /device/linaro/bootloader/OpenPlatformPkg/Chips/TexasInstruments/Omap35xx/Include/ |
| TPS65950.h | 49 #define LEDBON BIT1
|
| /device/linaro/bootloader/edk2/ArmPlatformPkg/Include/Drivers/ |
| SP804Timer.h | 34 #define SP804_TIMER_CTRL_32BIT BIT1
|
| /device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/ |
| PciPowerManagement.c | 73 PowerManagementCSR &= ~(BIT8 | BIT1 | BIT0);
|
| /device/linaro/bootloader/edk2/Omap35xxPkg/Include/Omap3530/ |
| Omap3530Interrupt.h | 45 #define INTCPS_CONTROL_NEWFIQAGR BIT1
|
| /device/linaro/bootloader/edk2/Omap35xxPkg/Include/ |
| TPS65950.h | 49 #define LEDBON BIT1
|
| /device/linaro/bootloader/edk2/OvmfPkg/AcpiTables/ |
| Platform.h | 60 #define RESET_VALUE (BIT2 | BIT1) // PIIX3 Reset CPU + System Reset
|
| /device/linaro/bootloader/edk2/SecurityPkg/Include/Guid/ |
| PhysicalPresenceData.h | 74 #define FLAG_NO_PPI_CLEAR BIT1
|
| TrEEPhysicalPresenceData.h | 38 #define TREE_FLAG_NO_PPI_CLEAR BIT1
|
| /device/linaro/bootloader/edk2/ShellPkg/Include/Protocol/ |
| EfiShellInterface.h | 40 ARG_PARTIALLY_QUOTED = BIT1,
|
| /device/linaro/bootloader/edk2/Vlv2DeviceRefCodePkg/ValleyView2Soc/SouthCluster/Include/PchRegs/ |
| PchRegsHda.h | 52 #define B_PCH_HDA_PCS_PS (BIT1 | BIT0) // Power State - D0/D3 Hot
|
| PchRegsRcrb.h | 50 #define B_PCH_RCRB_GCS_TS BIT1 // Top Swap
|
| PchRegsSpi.h | 56 #define B_PCH_SPI_HSFS_FCERR BIT1 // Flash Cycle Error
83 #define B_PCH_SPI_OPTYPE0_MASK (BIT1 | BIT0) // Opcode Type 0 Mask
114 #define B_PCH_SPI_BCR_BLE BIT1 // Lock Enable (LE)
|
| /cts/tests/app/app/res/values/ |
| styles.xml | 101 <item name="testFlags">bit1</item>
113 <item name="testFlags">bit1|bit2</item>
117 <item name="testFlags">bit1|bit2|bit31</item>
|
| /cts/tests/tests/content/res/values/ |
| styles.xml | 105 <item name="testFlags">bit1</item>
117 <item name="testFlags">bit1|bit2</item>
121 <item name="testFlags">bit1|bit2|bit31</item>
|
| /cts/tests/tests/graphics/res/values/ |
| styles.xml | 101 <item name="testFlags">bit1</item>
113 <item name="testFlags">bit1|bit2</item>
117 <item name="testFlags">bit1|bit2|bit31</item>
|
| /cts/tests/tests/view/res/values/ |
| styles.xml | 101 <item name="testFlags">bit1</item>
113 <item name="testFlags">bit1|bit2</item>
117 <item name="testFlags">bit1|bit2|bit31</item>
|
| /device/linaro/bootloader/edk2/Vlv2DeviceRefCodePkg/ValleyView2Soc/SouthCluster/Include/Library/ |
| I2CLib.h | 75 #define I2C_INTR_RX_OVER BIT1
100 #define STAT_TFNF BIT1 // TX FIFO is not full
137 #define I2C_INTR_RX_OVER BIT1
|
| /external/blktrace/ |
| blkiomon.c | 131 struct blk_io_trace *bit1 = &t1->bit; local
138 fprintf(debug.fp, "magic %16d %16d\n", bit1->magic, bit2->magic);
140 bit1->sequence, bit2->sequence);
142 (unsigned long)bit1->time, (unsigned long)bit2->time);
144 (unsigned long)bit1->sector, (unsigned long)bit2->sector);
145 fprintf(debug.fp, "bytes %16d %16d\n", bit1->bytes, bit2->bytes);
146 fprintf(debug.fp, "action %16x %16x\n", bit1->action, bit2->action);
147 fprintf(debug.fp, "pid %16d %16d\n", bit1->pid, bit2->pid);
148 fprintf(debug.fp, "device %16d %16d\n", bit1->device, bit2->device);
149 fprintf(debug.fp, "cpu %16d %16d\n", bit1->cpu, bit2->cpu)
[all...] |
| /external/libvpx/libvpx/vp8/decoder/ |
| detokenize.c | 112 const int bit1 = VP8GetBit(br, p[8]); local
113 const int bit0 = VP8GetBit(br, p[9 + bit1]);
114 const int cat = 2 * bit1 + bit0;
|
| /external/regex-re2/util/ |
| rune.cc | 22 Bit1 = 7,
29 T1 = ((1<<(Bit1+1))-1) ^ 0xFF, /* 0000 0000 */
36 Rune1 = (1<<(Bit1+0*Bitx))-1, /* 0000 0000 0111 1111 */
|
| /device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/XhciPei/ |
| XhciReg.h | 58 #define XHC_USBCMD_RESET BIT1 // Host Controller Reset
75 #define XHC_CRCR_CS BIT1 // Command Stop
82 #define XHC_PORTSC_PED BIT1 // Port Enabled/Disabled
99 #define XHC_HUB_PORTSC_PED BIT1 // Hub's Port Enabled/Disabled
110 #define XHC_IMAN_IE BIT1 // Interrupt Enable
|
