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  /external/llvm/lib/Target/Hexagon/MCTargetDesc/
HexagonShuffler.cpp 259 // Legacy conditional branch predicated on a register.
276 // Error if single branch with another branch.
308 // Error if indirect branch with another branch or
313 // Pin the branch to the highest slot available to it.
  /external/swiftshader/src/OpenGL/compiler/
intermOut.cpp 439 case EOpKill: out << "Branch: Kill"; break;
440 case EOpBreak: out << "Branch: Break"; break;
441 case EOpContinue: out << "Branch: Continue"; break;
442 case EOpReturn: out << "Branch: Return"; break;
443 default: out << "Branch: Unknown Branch"; break;
  /external/swiftshader/third_party/LLVM/lib/CodeGen/
IfConversion.cpp 53 static cl::opt<bool> IfCvtBranchFold("ifcvt-branch-fold",
427 /// branch. Swap block's 'true' and 'false' successors.
475 /// If 'FalseBranch' is true, it checks if 'true' block's false branch
493 // Ends with an unconditional branch. It will be removed.
499 // Require a conditional branch
573 // blocks, move the end iterators up past any branch instructions.
633 // No false branch. This BB must end with a conditional branch and a
683 // A conditional branch is not predicable, but it may be eliminated.
754 // Unanalyzable or ends with fallthrough or unconditional branch, or if is no
    [all...]
  /external/syslinux/efi32/include/efi/ia32/
pe.h 459 #define IMAGE_REL_PPC_ADDR24 0x0003 // 26-bit address, shifted left 2 (branch absolute)
462 #define IMAGE_REL_PPC_REL24 0x0006 // 26-bit PC-relative offset, shifted left 2 (branch relative)
478 #define IMAGE_REL_PPC_BRTAKEN 0x0200 // fix branch prediction bit to predict branch taken
479 #define IMAGE_REL_PPC_BRNTAKEN 0x0400 // fix branch prediction bit to predict branch not taken
  /external/syslinux/efi64/include/efi/x86_64/
pe.h 459 #define IMAGE_REL_PPC_ADDR24 0x0003 // 26-bit address, shifted left 2 (branch absolute)
462 #define IMAGE_REL_PPC_REL24 0x0006 // 26-bit PC-relative offset, shifted left 2 (branch relative)
478 #define IMAGE_REL_PPC_BRTAKEN 0x0200 // fix branch prediction bit to predict branch taken
479 #define IMAGE_REL_PPC_BRNTAKEN 0x0400 // fix branch prediction bit to predict branch not taken
  /external/syslinux/gnu-efi/gnu-efi-3.0/inc/ia32/
pe.h 459 #define IMAGE_REL_PPC_ADDR24 0x0003 // 26-bit address, shifted left 2 (branch absolute)
462 #define IMAGE_REL_PPC_REL24 0x0006 // 26-bit PC-relative offset, shifted left 2 (branch relative)
478 #define IMAGE_REL_PPC_BRTAKEN 0x0200 // fix branch prediction bit to predict branch taken
479 #define IMAGE_REL_PPC_BRNTAKEN 0x0400 // fix branch prediction bit to predict branch not taken
  /external/syslinux/gnu-efi/gnu-efi-3.0/inc/ia64/
pe.h 465 #define IMAGE_REL_PPC_ADDR24 0x0003 // 26-bit address, shifted left 2 (branch absolute)
468 #define IMAGE_REL_PPC_REL24 0x0006 // 26-bit PC-relative offset, shifted left 2 (branch relative)
484 #define IMAGE_REL_PPC_BRTAKEN 0x0200 // fix branch prediction bit to predict branch taken
485 #define IMAGE_REL_PPC_BRNTAKEN 0x0400 // fix branch prediction bit to predict branch not taken
  /external/syslinux/gnu-efi/gnu-efi-3.0/inc/x86_64/
pe.h 459 #define IMAGE_REL_PPC_ADDR24 0x0003 // 26-bit address, shifted left 2 (branch absolute)
462 #define IMAGE_REL_PPC_REL24 0x0006 // 26-bit PC-relative offset, shifted left 2 (branch relative)
478 #define IMAGE_REL_PPC_BRTAKEN 0x0200 // fix branch prediction bit to predict branch taken
479 #define IMAGE_REL_PPC_BRNTAKEN 0x0400 // fix branch prediction bit to predict branch not taken
  /external/v8/src/compiler/
schedule.cc 106 return os << "branch";
231 void Schedule::AddBranch(BasicBlock* block, Node* branch, BasicBlock* tblock,
234 DCHECK_EQ(IrOpcode::kBranch, branch->opcode());
238 SetControlInput(block, branch);
286 void Schedule::InsertBranch(BasicBlock* block, BasicBlock* end, Node* branch,
298 SetControlInput(block, branch);
  /external/v8/src/s390/
code-stubs-s390.h 96 // Patch an always taken branch into a NOP branch
102 // BRC - Branch Mask @ Bits 23-20
107 // BRCL - Branch Mask @ Bits 39-36
142 // INCREMENTAL_COMPACTION has NOP on second branch.
145 // INCREMENTAL has NOP on first branch.
  /external/valgrind/docs/internals/
3_3_BUGSTATUS.txt 5 pending = is scheduled to be fixed (or at least considered) on this branch
6 wontfix = will not fix on this branch
11 Vfd = fix has been verified on 3.3.X branch
14 ### merge fix to 3.3 branch
17 Vfd fix has been verified on 3.3.X branch
262 TRUNK 33BRANCH PRI BUG# WHAT
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/
mips.exp 553 run_dump_test_arches "branch-likely" [mips_arch_list_matching mips2 !mips32r6]
554 run_dump_test_arches "branch-misc-1" [mips_arch_list_matching mips1]
555 run_dump_test_arches "branch-misc-2" [mips_arch_list_matching mips1]
556 run_dump_test_arches "branch-misc-2pic" [mips_arch_list_matching mips1]
557 run_dump_test_arches "branch-misc-2-64" [mips_arch_list_matching mips3]
558 run_dump_test_arches "branch-misc-2pic-64" [mips_arch_list_matching mips3]
559 run_dump_test "branch-misc-3"
560 run_dump_test "branch-swap"
562 # Sweep a range of branch offsets so that it hits a position where
569 run_list_test "branch-swap-2" "--defsym count=$count"
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  /toolchain/binutils/binutils-2.25/include/
dis-asm.h 42 dis_nonbranch, /* Not a branch instruction. */
43 dis_branch, /* Unconditional branch. */
44 dis_condbranch, /* Conditional branch. */
203 char insn_info_valid; /* Branch info has been set. */
205 a branch takes effect. (0 = normal) */
208 bfd_vma target; /* Target address of branch or dref, if known;
  /external/v8/src/arm64/
assembler-arm64.h 710 // includes alignment padding and branch over.
713 // pc. The size will include the branch over the pool if it was requested.
715 // Emit the literal pool at the current pc with a branch over the pool if
805 // the branch/call instruction at pc.
808 // Read/Modify the code target address in the branch/call instruction at pc.
826 // This sets the branch destination (which is in the constant pool on ARM).
    [all...]
  /art/runtime/verifier/
method_verifier.h 54 // it at branch points (for verification) or GC points and branches (for verification +
71 // branch target addresses (because we merge into that).
344 * "branch target" flags for exception handlers.
363 * As a side effect, this sets the "branch target" flags in InsnFlags.
368 * - target of each jump and branch instruction must be valid
431 // Verify that the target of a branch instruction is valid. We don't expect code to jump directly
435 // Updates "insn_flags_", setting the "branch target" flag.
439 // Updates "insn_flags_", setting the "branch target" flag.
461 // Extract the relative offset from a branch instruction.
462 // Returns "false" on failure (e.g. this isn't a branch instruction)
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  /external/clang/test/Analysis/
misc-ps-eager-assume.m 32 // symbolic expression is literally the branch condition.
49 // a symbolic value for this variable, but in the branch condition it is
53 // path-sensitivity and use the symbol for 'needsAnArray' in the branch
  /external/fec/
viterbi27_av.c 89 * But this avoids a conditional branch, and the writes will
135 /* Form first set of 16 branch metrics */
146 /* Form second set of 16 branch metrics */
viterbi39_sse2.c 92 * But this avoids a conditional branch, and the writes will
137 /* Form branch metrics
146 /* Add branch metrics to path metrics */
  /external/jacoco/org.jacoco.doc/docroot/doc/
counters.html 49 JaCoCo also calculates <i>branch coverage</i> for all <code>if</code> and
52 Branch coverage is always available, even in absence of debug information in
107 Based on the coverage status of each branch JaCoCo also calculates covered and
  /external/javassist/src/main/javassist/bytecode/
CodeAnalyzer.java 182 return true; // always branch.
186 return false; // may not branch.
194 throw new BadBytecode("bad branch offset at " + opIndex);
  /external/javassist/src/main/javassist/bytecode/stackmap/
Tracer.java 118 * @param offsetPos the position of the branch-target table.
119 * @param defaultOffset the offset to the default branch target.
128 * @param offsetPos the position of the table of pairs of a value and a branch target.
129 * @param defaultOffset the offset to the default branch target.
550 stackTop--; // branch
561 stackTop -= 2; // branch
566 return 3; // branch
569 return 3; // branch
574 stackTop--; // branch
582 stackTop--; // branch
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  /external/libhevc/common/
ihevc_defs.h 452 #define MAX_HEVC_QP 51 //FOR MAIN Branch Encoder
454 #define MAX_HEVC_QP_10bit 63 //FOR HBD Branch Encoder
456 #define MAX_HEVC_QP_12bit 75 //FOR HBD Branch Encoder
  /external/llvm/lib/CodeGen/
EarlyIfConversion.cpp 14 // Instructions from both sides of the branch are executed specutatively, and a
87 /// The block containing the conditional branch.
113 // Latencies from Cond+Branch, TReg, and FReg to DstReg.
123 /// The branch condition determined by AnalyzeBranch.
387 // The branch we're looking to eliminate must be analyzable.
390 DEBUG(dbgs() << "Branch not analyzable.\n");
396 DEBUG(dbgs() << "AnalyzeBranch didn't find conditional branch.\n");
400 // AnalyzeBranch doesn't set FBB on a fall-through branch.
548 // It should become a single branch or a fallthrough.
574 // We need a branch to Tail, let code placement work it out later
    [all...]
  /external/llvm/lib/Target/Hexagon/
HexagonCFGOptimizer.cpp 164 // The target of the unconditional branch must be JumpAroundTarget.
165 // TODO: If not, we should not invert the unconditional branch.
196 // Remove the unconditional branch in LayoutSucc.
  /external/llvm/lib/Target/Sparc/
SparcISelLowering.h 29 BRICC, // Branch to dest on icc condition
30 BRXCC, // Branch to dest on xcc condition (64-bit only).
31 BRFCC, // Branch to dest on fcc condition

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