1 //===-- IfConversion.cpp - Machine code if conversion pass. ---------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file implements the machine instruction level if-conversion pass. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #define DEBUG_TYPE "ifcvt" 15 #include "BranchFolding.h" 16 #include "llvm/Function.h" 17 #include "llvm/CodeGen/Passes.h" 18 #include "llvm/CodeGen/MachineModuleInfo.h" 19 #include "llvm/CodeGen/MachineBranchProbabilityInfo.h" 20 #include "llvm/CodeGen/MachineFunctionPass.h" 21 #include "llvm/MC/MCInstrItineraries.h" 22 #include "llvm/Target/TargetInstrInfo.h" 23 #include "llvm/Target/TargetLowering.h" 24 #include "llvm/Target/TargetMachine.h" 25 #include "llvm/Target/TargetRegisterInfo.h" 26 #include "llvm/Support/CommandLine.h" 27 #include "llvm/Support/Debug.h" 28 #include "llvm/Support/ErrorHandling.h" 29 #include "llvm/Support/raw_ostream.h" 30 #include "llvm/ADT/SmallSet.h" 31 #include "llvm/ADT/Statistic.h" 32 #include "llvm/ADT/STLExtras.h" 33 using namespace llvm; 34 35 // Hidden options for help debugging. 36 static cl::opt<int> IfCvtFnStart("ifcvt-fn-start", cl::init(-1), cl::Hidden); 37 static cl::opt<int> IfCvtFnStop("ifcvt-fn-stop", cl::init(-1), cl::Hidden); 38 static cl::opt<int> IfCvtLimit("ifcvt-limit", cl::init(-1), cl::Hidden); 39 static cl::opt<bool> DisableSimple("disable-ifcvt-simple", 40 cl::init(false), cl::Hidden); 41 static cl::opt<bool> DisableSimpleF("disable-ifcvt-simple-false", 42 cl::init(false), cl::Hidden); 43 static cl::opt<bool> DisableTriangle("disable-ifcvt-triangle", 44 cl::init(false), cl::Hidden); 45 static cl::opt<bool> DisableTriangleR("disable-ifcvt-triangle-rev", 46 cl::init(false), cl::Hidden); 47 static cl::opt<bool> DisableTriangleF("disable-ifcvt-triangle-false", 48 cl::init(false), cl::Hidden); 49 static cl::opt<bool> DisableTriangleFR("disable-ifcvt-triangle-false-rev", 50 cl::init(false), cl::Hidden); 51 static cl::opt<bool> DisableDiamond("disable-ifcvt-diamond", 52 cl::init(false), cl::Hidden); 53 static cl::opt<bool> IfCvtBranchFold("ifcvt-branch-fold", 54 cl::init(true), cl::Hidden); 55 56 STATISTIC(NumSimple, "Number of simple if-conversions performed"); 57 STATISTIC(NumSimpleFalse, "Number of simple (F) if-conversions performed"); 58 STATISTIC(NumTriangle, "Number of triangle if-conversions performed"); 59 STATISTIC(NumTriangleRev, "Number of triangle (R) if-conversions performed"); 60 STATISTIC(NumTriangleFalse,"Number of triangle (F) if-conversions performed"); 61 STATISTIC(NumTriangleFRev, "Number of triangle (F/R) if-conversions performed"); 62 STATISTIC(NumDiamonds, "Number of diamond if-conversions performed"); 63 STATISTIC(NumIfConvBBs, "Number of if-converted blocks"); 64 STATISTIC(NumDupBBs, "Number of duplicated blocks"); 65 66 namespace { 67 class IfConverter : public MachineFunctionPass { 68 enum IfcvtKind { 69 ICNotClassfied, // BB data valid, but not classified. 70 ICSimpleFalse, // Same as ICSimple, but on the false path. 71 ICSimple, // BB is entry of an one split, no rejoin sub-CFG. 72 ICTriangleFRev, // Same as ICTriangleFalse, but false path rev condition. 73 ICTriangleRev, // Same as ICTriangle, but true path rev condition. 74 ICTriangleFalse, // Same as ICTriangle, but on the false path. 75 ICTriangle, // BB is entry of a triangle sub-CFG. 76 ICDiamond // BB is entry of a diamond sub-CFG. 77 }; 78 79 /// BBInfo - One per MachineBasicBlock, this is used to cache the result 80 /// if-conversion feasibility analysis. This includes results from 81 /// TargetInstrInfo::AnalyzeBranch() (i.e. TBB, FBB, and Cond), and its 82 /// classification, and common tail block of its successors (if it's a 83 /// diamond shape), its size, whether it's predicable, and whether any 84 /// instruction can clobber the 'would-be' predicate. 85 /// 86 /// IsDone - True if BB is not to be considered for ifcvt. 87 /// IsBeingAnalyzed - True if BB is currently being analyzed. 88 /// IsAnalyzed - True if BB has been analyzed (info is still valid). 89 /// IsEnqueued - True if BB has been enqueued to be ifcvt'ed. 90 /// IsBrAnalyzable - True if AnalyzeBranch() returns false. 91 /// HasFallThrough - True if BB may fallthrough to the following BB. 92 /// IsUnpredicable - True if BB is known to be unpredicable. 93 /// ClobbersPred - True if BB could modify predicates (e.g. has 94 /// cmp, call, etc.) 95 /// NonPredSize - Number of non-predicated instructions. 96 /// ExtraCost - Extra cost for multi-cycle instructions. 97 /// ExtraCost2 - Some instructions are slower when predicated 98 /// BB - Corresponding MachineBasicBlock. 99 /// TrueBB / FalseBB- See AnalyzeBranch(). 100 /// BrCond - Conditions for end of block conditional branches. 101 /// Predicate - Predicate used in the BB. 102 struct BBInfo { 103 bool IsDone : 1; 104 bool IsBeingAnalyzed : 1; 105 bool IsAnalyzed : 1; 106 bool IsEnqueued : 1; 107 bool IsBrAnalyzable : 1; 108 bool HasFallThrough : 1; 109 bool IsUnpredicable : 1; 110 bool CannotBeCopied : 1; 111 bool ClobbersPred : 1; 112 unsigned NonPredSize; 113 unsigned ExtraCost; 114 unsigned ExtraCost2; 115 MachineBasicBlock *BB; 116 MachineBasicBlock *TrueBB; 117 MachineBasicBlock *FalseBB; 118 SmallVector<MachineOperand, 4> BrCond; 119 SmallVector<MachineOperand, 4> Predicate; 120 BBInfo() : IsDone(false), IsBeingAnalyzed(false), 121 IsAnalyzed(false), IsEnqueued(false), IsBrAnalyzable(false), 122 HasFallThrough(false), IsUnpredicable(false), 123 CannotBeCopied(false), ClobbersPred(false), NonPredSize(0), 124 ExtraCost(0), ExtraCost2(0), BB(0), TrueBB(0), FalseBB(0) {} 125 }; 126 127 /// IfcvtToken - Record information about pending if-conversions to attempt: 128 /// BBI - Corresponding BBInfo. 129 /// Kind - Type of block. See IfcvtKind. 130 /// NeedSubsumption - True if the to-be-predicated BB has already been 131 /// predicated. 132 /// NumDups - Number of instructions that would be duplicated due 133 /// to this if-conversion. (For diamonds, the number of 134 /// identical instructions at the beginnings of both 135 /// paths). 136 /// NumDups2 - For diamonds, the number of identical instructions 137 /// at the ends of both paths. 138 struct IfcvtToken { 139 BBInfo &BBI; 140 IfcvtKind Kind; 141 bool NeedSubsumption; 142 unsigned NumDups; 143 unsigned NumDups2; 144 IfcvtToken(BBInfo &b, IfcvtKind k, bool s, unsigned d, unsigned d2 = 0) 145 : BBI(b), Kind(k), NeedSubsumption(s), NumDups(d), NumDups2(d2) {} 146 }; 147 148 /// BBAnalysis - Results of if-conversion feasibility analysis indexed by 149 /// basic block number. 150 std::vector<BBInfo> BBAnalysis; 151 152 const TargetLowering *TLI; 153 const TargetInstrInfo *TII; 154 const TargetRegisterInfo *TRI; 155 const InstrItineraryData *InstrItins; 156 const MachineBranchProbabilityInfo *MBPI; 157 158 bool MadeChange; 159 int FnNum; 160 public: 161 static char ID; 162 IfConverter() : MachineFunctionPass(ID), FnNum(-1) { 163 initializeIfConverterPass(*PassRegistry::getPassRegistry()); 164 } 165 166 virtual void getAnalysisUsage(AnalysisUsage &AU) const { 167 AU.addRequired<MachineBranchProbabilityInfo>(); 168 MachineFunctionPass::getAnalysisUsage(AU); 169 } 170 171 virtual bool runOnMachineFunction(MachineFunction &MF); 172 virtual const char *getPassName() const { return "If Converter"; } 173 174 private: 175 bool ReverseBranchCondition(BBInfo &BBI); 176 bool ValidSimple(BBInfo &TrueBBI, unsigned &Dups, 177 const BranchProbability &Prediction) const; 178 bool ValidTriangle(BBInfo &TrueBBI, BBInfo &FalseBBI, 179 bool FalseBranch, unsigned &Dups, 180 const BranchProbability &Prediction) const; 181 bool ValidDiamond(BBInfo &TrueBBI, BBInfo &FalseBBI, 182 unsigned &Dups1, unsigned &Dups2) const; 183 void ScanInstructions(BBInfo &BBI); 184 BBInfo &AnalyzeBlock(MachineBasicBlock *BB, 185 std::vector<IfcvtToken*> &Tokens); 186 bool FeasibilityAnalysis(BBInfo &BBI, SmallVectorImpl<MachineOperand> &Cond, 187 bool isTriangle = false, bool RevBranch = false); 188 void AnalyzeBlocks(MachineFunction &MF, std::vector<IfcvtToken*> &Tokens); 189 void InvalidatePreds(MachineBasicBlock *BB); 190 void RemoveExtraEdges(BBInfo &BBI); 191 bool IfConvertSimple(BBInfo &BBI, IfcvtKind Kind); 192 bool IfConvertTriangle(BBInfo &BBI, IfcvtKind Kind); 193 bool IfConvertDiamond(BBInfo &BBI, IfcvtKind Kind, 194 unsigned NumDups1, unsigned NumDups2); 195 void PredicateBlock(BBInfo &BBI, 196 MachineBasicBlock::iterator E, 197 SmallVectorImpl<MachineOperand> &Cond, 198 SmallSet<unsigned, 4> &Redefs); 199 void CopyAndPredicateBlock(BBInfo &ToBBI, BBInfo &FromBBI, 200 SmallVectorImpl<MachineOperand> &Cond, 201 SmallSet<unsigned, 4> &Redefs, 202 bool IgnoreBr = false); 203 void MergeBlocks(BBInfo &ToBBI, BBInfo &FromBBI, bool AddEdges = true); 204 205 bool MeetIfcvtSizeLimit(MachineBasicBlock &BB, 206 unsigned Cycle, unsigned Extra, 207 const BranchProbability &Prediction) const { 208 return Cycle > 0 && TII->isProfitableToIfCvt(BB, Cycle, Extra, 209 Prediction); 210 } 211 212 bool MeetIfcvtSizeLimit(MachineBasicBlock &TBB, 213 unsigned TCycle, unsigned TExtra, 214 MachineBasicBlock &FBB, 215 unsigned FCycle, unsigned FExtra, 216 const BranchProbability &Prediction) const { 217 return TCycle > 0 && FCycle > 0 && 218 TII->isProfitableToIfCvt(TBB, TCycle, TExtra, FBB, FCycle, FExtra, 219 Prediction); 220 } 221 222 // blockAlwaysFallThrough - Block ends without a terminator. 223 bool blockAlwaysFallThrough(BBInfo &BBI) const { 224 return BBI.IsBrAnalyzable && BBI.TrueBB == NULL; 225 } 226 227 // IfcvtTokenCmp - Used to sort if-conversion candidates. 228 static bool IfcvtTokenCmp(IfcvtToken *C1, IfcvtToken *C2) { 229 int Incr1 = (C1->Kind == ICDiamond) 230 ? -(int)(C1->NumDups + C1->NumDups2) : (int)C1->NumDups; 231 int Incr2 = (C2->Kind == ICDiamond) 232 ? -(int)(C2->NumDups + C2->NumDups2) : (int)C2->NumDups; 233 if (Incr1 > Incr2) 234 return true; 235 else if (Incr1 == Incr2) { 236 // Favors subsumption. 237 if (C1->NeedSubsumption == false && C2->NeedSubsumption == true) 238 return true; 239 else if (C1->NeedSubsumption == C2->NeedSubsumption) { 240 // Favors diamond over triangle, etc. 241 if ((unsigned)C1->Kind < (unsigned)C2->Kind) 242 return true; 243 else if (C1->Kind == C2->Kind) 244 return C1->BBI.BB->getNumber() < C2->BBI.BB->getNumber(); 245 } 246 } 247 return false; 248 } 249 }; 250 251 char IfConverter::ID = 0; 252 } 253 254 INITIALIZE_PASS_BEGIN(IfConverter, "if-converter", "If Converter", false, false) 255 INITIALIZE_PASS_DEPENDENCY(MachineBranchProbabilityInfo) 256 INITIALIZE_PASS_END(IfConverter, "if-converter", "If Converter", false, false) 257 258 FunctionPass *llvm::createIfConverterPass() { return new IfConverter(); } 259 260 bool IfConverter::runOnMachineFunction(MachineFunction &MF) { 261 TLI = MF.getTarget().getTargetLowering(); 262 TII = MF.getTarget().getInstrInfo(); 263 TRI = MF.getTarget().getRegisterInfo(); 264 MBPI = &getAnalysis<MachineBranchProbabilityInfo>(); 265 InstrItins = MF.getTarget().getInstrItineraryData(); 266 if (!TII) return false; 267 268 // Tail merge tend to expose more if-conversion opportunities. 269 BranchFolder BF(true, false); 270 bool BFChange = BF.OptimizeFunction(MF, TII, 271 MF.getTarget().getRegisterInfo(), 272 getAnalysisIfAvailable<MachineModuleInfo>()); 273 274 DEBUG(dbgs() << "\nIfcvt: function (" << ++FnNum << ") \'" 275 << MF.getFunction()->getName() << "\'"); 276 277 if (FnNum < IfCvtFnStart || (IfCvtFnStop != -1 && FnNum > IfCvtFnStop)) { 278 DEBUG(dbgs() << " skipped\n"); 279 return false; 280 } 281 DEBUG(dbgs() << "\n"); 282 283 MF.RenumberBlocks(); 284 BBAnalysis.resize(MF.getNumBlockIDs()); 285 286 std::vector<IfcvtToken*> Tokens; 287 MadeChange = false; 288 unsigned NumIfCvts = NumSimple + NumSimpleFalse + NumTriangle + 289 NumTriangleRev + NumTriangleFalse + NumTriangleFRev + NumDiamonds; 290 while (IfCvtLimit == -1 || (int)NumIfCvts < IfCvtLimit) { 291 // Do an initial analysis for each basic block and find all the potential 292 // candidates to perform if-conversion. 293 bool Change = false; 294 AnalyzeBlocks(MF, Tokens); 295 while (!Tokens.empty()) { 296 IfcvtToken *Token = Tokens.back(); 297 Tokens.pop_back(); 298 BBInfo &BBI = Token->BBI; 299 IfcvtKind Kind = Token->Kind; 300 unsigned NumDups = Token->NumDups; 301 unsigned NumDups2 = Token->NumDups2; 302 303 delete Token; 304 305 // If the block has been evicted out of the queue or it has already been 306 // marked dead (due to it being predicated), then skip it. 307 if (BBI.IsDone) 308 BBI.IsEnqueued = false; 309 if (!BBI.IsEnqueued) 310 continue; 311 312 BBI.IsEnqueued = false; 313 314 bool RetVal = false; 315 switch (Kind) { 316 default: assert(false && "Unexpected!"); 317 break; 318 case ICSimple: 319 case ICSimpleFalse: { 320 bool isFalse = Kind == ICSimpleFalse; 321 if ((isFalse && DisableSimpleF) || (!isFalse && DisableSimple)) break; 322 DEBUG(dbgs() << "Ifcvt (Simple" << (Kind == ICSimpleFalse ? 323 " false" : "") 324 << "): BB#" << BBI.BB->getNumber() << " (" 325 << ((Kind == ICSimpleFalse) 326 ? BBI.FalseBB->getNumber() 327 : BBI.TrueBB->getNumber()) << ") "); 328 RetVal = IfConvertSimple(BBI, Kind); 329 DEBUG(dbgs() << (RetVal ? "succeeded!" : "failed!") << "\n"); 330 if (RetVal) { 331 if (isFalse) ++NumSimpleFalse; 332 else ++NumSimple; 333 } 334 break; 335 } 336 case ICTriangle: 337 case ICTriangleRev: 338 case ICTriangleFalse: 339 case ICTriangleFRev: { 340 bool isFalse = Kind == ICTriangleFalse; 341 bool isRev = (Kind == ICTriangleRev || Kind == ICTriangleFRev); 342 if (DisableTriangle && !isFalse && !isRev) break; 343 if (DisableTriangleR && !isFalse && isRev) break; 344 if (DisableTriangleF && isFalse && !isRev) break; 345 if (DisableTriangleFR && isFalse && isRev) break; 346 DEBUG(dbgs() << "Ifcvt (Triangle"); 347 if (isFalse) 348 DEBUG(dbgs() << " false"); 349 if (isRev) 350 DEBUG(dbgs() << " rev"); 351 DEBUG(dbgs() << "): BB#" << BBI.BB->getNumber() << " (T:" 352 << BBI.TrueBB->getNumber() << ",F:" 353 << BBI.FalseBB->getNumber() << ") "); 354 RetVal = IfConvertTriangle(BBI, Kind); 355 DEBUG(dbgs() << (RetVal ? "succeeded!" : "failed!") << "\n"); 356 if (RetVal) { 357 if (isFalse) { 358 if (isRev) ++NumTriangleFRev; 359 else ++NumTriangleFalse; 360 } else { 361 if (isRev) ++NumTriangleRev; 362 else ++NumTriangle; 363 } 364 } 365 break; 366 } 367 case ICDiamond: { 368 if (DisableDiamond) break; 369 DEBUG(dbgs() << "Ifcvt (Diamond): BB#" << BBI.BB->getNumber() << " (T:" 370 << BBI.TrueBB->getNumber() << ",F:" 371 << BBI.FalseBB->getNumber() << ") "); 372 RetVal = IfConvertDiamond(BBI, Kind, NumDups, NumDups2); 373 DEBUG(dbgs() << (RetVal ? "succeeded!" : "failed!") << "\n"); 374 if (RetVal) ++NumDiamonds; 375 break; 376 } 377 } 378 379 Change |= RetVal; 380 381 NumIfCvts = NumSimple + NumSimpleFalse + NumTriangle + NumTriangleRev + 382 NumTriangleFalse + NumTriangleFRev + NumDiamonds; 383 if (IfCvtLimit != -1 && (int)NumIfCvts >= IfCvtLimit) 384 break; 385 } 386 387 if (!Change) 388 break; 389 MadeChange |= Change; 390 } 391 392 // Delete tokens in case of early exit. 393 while (!Tokens.empty()) { 394 IfcvtToken *Token = Tokens.back(); 395 Tokens.pop_back(); 396 delete Token; 397 } 398 399 Tokens.clear(); 400 BBAnalysis.clear(); 401 402 if (MadeChange && IfCvtBranchFold) { 403 BranchFolder BF(false, false); 404 BF.OptimizeFunction(MF, TII, 405 MF.getTarget().getRegisterInfo(), 406 getAnalysisIfAvailable<MachineModuleInfo>()); 407 } 408 409 MadeChange |= BFChange; 410 return MadeChange; 411 } 412 413 /// findFalseBlock - BB has a fallthrough. Find its 'false' successor given 414 /// its 'true' successor. 415 static MachineBasicBlock *findFalseBlock(MachineBasicBlock *BB, 416 MachineBasicBlock *TrueBB) { 417 for (MachineBasicBlock::succ_iterator SI = BB->succ_begin(), 418 E = BB->succ_end(); SI != E; ++SI) { 419 MachineBasicBlock *SuccBB = *SI; 420 if (SuccBB != TrueBB) 421 return SuccBB; 422 } 423 return NULL; 424 } 425 426 /// ReverseBranchCondition - Reverse the condition of the end of the block 427 /// branch. Swap block's 'true' and 'false' successors. 428 bool IfConverter::ReverseBranchCondition(BBInfo &BBI) { 429 DebugLoc dl; // FIXME: this is nowhere 430 if (!TII->ReverseBranchCondition(BBI.BrCond)) { 431 TII->RemoveBranch(*BBI.BB); 432 TII->InsertBranch(*BBI.BB, BBI.FalseBB, BBI.TrueBB, BBI.BrCond, dl); 433 std::swap(BBI.TrueBB, BBI.FalseBB); 434 return true; 435 } 436 return false; 437 } 438 439 /// getNextBlock - Returns the next block in the function blocks ordering. If 440 /// it is the end, returns NULL. 441 static inline MachineBasicBlock *getNextBlock(MachineBasicBlock *BB) { 442 MachineFunction::iterator I = BB; 443 MachineFunction::iterator E = BB->getParent()->end(); 444 if (++I == E) 445 return NULL; 446 return I; 447 } 448 449 /// ValidSimple - Returns true if the 'true' block (along with its 450 /// predecessor) forms a valid simple shape for ifcvt. It also returns the 451 /// number of instructions that the ifcvt would need to duplicate if performed 452 /// in Dups. 453 bool IfConverter::ValidSimple(BBInfo &TrueBBI, unsigned &Dups, 454 const BranchProbability &Prediction) const { 455 Dups = 0; 456 if (TrueBBI.IsBeingAnalyzed || TrueBBI.IsDone) 457 return false; 458 459 if (TrueBBI.IsBrAnalyzable) 460 return false; 461 462 if (TrueBBI.BB->pred_size() > 1) { 463 if (TrueBBI.CannotBeCopied || 464 !TII->isProfitableToDupForIfCvt(*TrueBBI.BB, TrueBBI.NonPredSize, 465 Prediction)) 466 return false; 467 Dups = TrueBBI.NonPredSize; 468 } 469 470 return true; 471 } 472 473 /// ValidTriangle - Returns true if the 'true' and 'false' blocks (along 474 /// with their common predecessor) forms a valid triangle shape for ifcvt. 475 /// If 'FalseBranch' is true, it checks if 'true' block's false branch 476 /// branches to the 'false' block rather than the other way around. It also 477 /// returns the number of instructions that the ifcvt would need to duplicate 478 /// if performed in 'Dups'. 479 bool IfConverter::ValidTriangle(BBInfo &TrueBBI, BBInfo &FalseBBI, 480 bool FalseBranch, unsigned &Dups, 481 const BranchProbability &Prediction) const { 482 Dups = 0; 483 if (TrueBBI.IsBeingAnalyzed || TrueBBI.IsDone) 484 return false; 485 486 if (TrueBBI.BB->pred_size() > 1) { 487 if (TrueBBI.CannotBeCopied) 488 return false; 489 490 unsigned Size = TrueBBI.NonPredSize; 491 if (TrueBBI.IsBrAnalyzable) { 492 if (TrueBBI.TrueBB && TrueBBI.BrCond.empty()) 493 // Ends with an unconditional branch. It will be removed. 494 --Size; 495 else { 496 MachineBasicBlock *FExit = FalseBranch 497 ? TrueBBI.TrueBB : TrueBBI.FalseBB; 498 if (FExit) 499 // Require a conditional branch 500 ++Size; 501 } 502 } 503 if (!TII->isProfitableToDupForIfCvt(*TrueBBI.BB, Size, Prediction)) 504 return false; 505 Dups = Size; 506 } 507 508 MachineBasicBlock *TExit = FalseBranch ? TrueBBI.FalseBB : TrueBBI.TrueBB; 509 if (!TExit && blockAlwaysFallThrough(TrueBBI)) { 510 MachineFunction::iterator I = TrueBBI.BB; 511 if (++I == TrueBBI.BB->getParent()->end()) 512 return false; 513 TExit = I; 514 } 515 return TExit && TExit == FalseBBI.BB; 516 } 517 518 /// ValidDiamond - Returns true if the 'true' and 'false' blocks (along 519 /// with their common predecessor) forms a valid diamond shape for ifcvt. 520 bool IfConverter::ValidDiamond(BBInfo &TrueBBI, BBInfo &FalseBBI, 521 unsigned &Dups1, unsigned &Dups2) const { 522 Dups1 = Dups2 = 0; 523 if (TrueBBI.IsBeingAnalyzed || TrueBBI.IsDone || 524 FalseBBI.IsBeingAnalyzed || FalseBBI.IsDone) 525 return false; 526 527 MachineBasicBlock *TT = TrueBBI.TrueBB; 528 MachineBasicBlock *FT = FalseBBI.TrueBB; 529 530 if (!TT && blockAlwaysFallThrough(TrueBBI)) 531 TT = getNextBlock(TrueBBI.BB); 532 if (!FT && blockAlwaysFallThrough(FalseBBI)) 533 FT = getNextBlock(FalseBBI.BB); 534 if (TT != FT) 535 return false; 536 if (TT == NULL && (TrueBBI.IsBrAnalyzable || FalseBBI.IsBrAnalyzable)) 537 return false; 538 if (TrueBBI.BB->pred_size() > 1 || FalseBBI.BB->pred_size() > 1) 539 return false; 540 541 // FIXME: Allow true block to have an early exit? 542 if (TrueBBI.FalseBB || FalseBBI.FalseBB || 543 (TrueBBI.ClobbersPred && FalseBBI.ClobbersPred)) 544 return false; 545 546 // Count duplicate instructions at the beginning of the true and false blocks. 547 MachineBasicBlock::iterator TIB = TrueBBI.BB->begin(); 548 MachineBasicBlock::iterator FIB = FalseBBI.BB->begin(); 549 MachineBasicBlock::iterator TIE = TrueBBI.BB->end(); 550 MachineBasicBlock::iterator FIE = FalseBBI.BB->end(); 551 while (TIB != TIE && FIB != FIE) { 552 // Skip dbg_value instructions. These do not count. 553 if (TIB->isDebugValue()) { 554 while (TIB != TIE && TIB->isDebugValue()) 555 ++TIB; 556 if (TIB == TIE) 557 break; 558 } 559 if (FIB->isDebugValue()) { 560 while (FIB != FIE && FIB->isDebugValue()) 561 ++FIB; 562 if (FIB == FIE) 563 break; 564 } 565 if (!TIB->isIdenticalTo(FIB)) 566 break; 567 ++Dups1; 568 ++TIB; 569 ++FIB; 570 } 571 572 // Now, in preparation for counting duplicate instructions at the ends of the 573 // blocks, move the end iterators up past any branch instructions. 574 while (TIE != TIB) { 575 --TIE; 576 if (!TIE->getDesc().isBranch()) 577 break; 578 } 579 while (FIE != FIB) { 580 --FIE; 581 if (!FIE->getDesc().isBranch()) 582 break; 583 } 584 585 // If Dups1 includes all of a block, then don't count duplicate 586 // instructions at the end of the blocks. 587 if (TIB == TIE || FIB == FIE) 588 return true; 589 590 // Count duplicate instructions at the ends of the blocks. 591 while (TIE != TIB && FIE != FIB) { 592 // Skip dbg_value instructions. These do not count. 593 if (TIE->isDebugValue()) { 594 while (TIE != TIB && TIE->isDebugValue()) 595 --TIE; 596 if (TIE == TIB) 597 break; 598 } 599 if (FIE->isDebugValue()) { 600 while (FIE != FIB && FIE->isDebugValue()) 601 --FIE; 602 if (FIE == FIB) 603 break; 604 } 605 if (!TIE->isIdenticalTo(FIE)) 606 break; 607 ++Dups2; 608 --TIE; 609 --FIE; 610 } 611 612 return true; 613 } 614 615 /// ScanInstructions - Scan all the instructions in the block to determine if 616 /// the block is predicable. In most cases, that means all the instructions 617 /// in the block are isPredicable(). Also checks if the block contains any 618 /// instruction which can clobber a predicate (e.g. condition code register). 619 /// If so, the block is not predicable unless it's the last instruction. 620 void IfConverter::ScanInstructions(BBInfo &BBI) { 621 if (BBI.IsDone) 622 return; 623 624 bool AlreadyPredicated = BBI.Predicate.size() > 0; 625 // First analyze the end of BB branches. 626 BBI.TrueBB = BBI.FalseBB = NULL; 627 BBI.BrCond.clear(); 628 BBI.IsBrAnalyzable = 629 !TII->AnalyzeBranch(*BBI.BB, BBI.TrueBB, BBI.FalseBB, BBI.BrCond); 630 BBI.HasFallThrough = BBI.IsBrAnalyzable && BBI.FalseBB == NULL; 631 632 if (BBI.BrCond.size()) { 633 // No false branch. This BB must end with a conditional branch and a 634 // fallthrough. 635 if (!BBI.FalseBB) 636 BBI.FalseBB = findFalseBlock(BBI.BB, BBI.TrueBB); 637 if (!BBI.FalseBB) { 638 // Malformed bcc? True and false blocks are the same? 639 BBI.IsUnpredicable = true; 640 return; 641 } 642 } 643 644 // Then scan all the instructions. 645 BBI.NonPredSize = 0; 646 BBI.ExtraCost = 0; 647 BBI.ExtraCost2 = 0; 648 BBI.ClobbersPred = false; 649 for (MachineBasicBlock::iterator I = BBI.BB->begin(), E = BBI.BB->end(); 650 I != E; ++I) { 651 if (I->isDebugValue()) 652 continue; 653 654 const MCInstrDesc &MCID = I->getDesc(); 655 if (MCID.isNotDuplicable()) 656 BBI.CannotBeCopied = true; 657 658 bool isPredicated = TII->isPredicated(I); 659 bool isCondBr = BBI.IsBrAnalyzable && MCID.isConditionalBranch(); 660 661 if (!isCondBr) { 662 if (!isPredicated) { 663 BBI.NonPredSize++; 664 unsigned ExtraPredCost = 0; 665 unsigned NumCycles = TII->getInstrLatency(InstrItins, &*I, 666 &ExtraPredCost); 667 if (NumCycles > 1) 668 BBI.ExtraCost += NumCycles-1; 669 BBI.ExtraCost2 += ExtraPredCost; 670 } else if (!AlreadyPredicated) { 671 // FIXME: This instruction is already predicated before the 672 // if-conversion pass. It's probably something like a conditional move. 673 // Mark this block unpredicable for now. 674 BBI.IsUnpredicable = true; 675 return; 676 } 677 } 678 679 if (BBI.ClobbersPred && !isPredicated) { 680 // Predicate modification instruction should end the block (except for 681 // already predicated instructions and end of block branches). 682 if (isCondBr) { 683 // A conditional branch is not predicable, but it may be eliminated. 684 continue; 685 } 686 687 // Predicate may have been modified, the subsequent (currently) 688 // unpredicated instructions cannot be correctly predicated. 689 BBI.IsUnpredicable = true; 690 return; 691 } 692 693 // FIXME: Make use of PredDefs? e.g. ADDC, SUBC sets predicates but are 694 // still potentially predicable. 695 std::vector<MachineOperand> PredDefs; 696 if (TII->DefinesPredicate(I, PredDefs)) 697 BBI.ClobbersPred = true; 698 699 if (!TII->isPredicable(I)) { 700 BBI.IsUnpredicable = true; 701 return; 702 } 703 } 704 } 705 706 /// FeasibilityAnalysis - Determine if the block is a suitable candidate to be 707 /// predicated by the specified predicate. 708 bool IfConverter::FeasibilityAnalysis(BBInfo &BBI, 709 SmallVectorImpl<MachineOperand> &Pred, 710 bool isTriangle, bool RevBranch) { 711 // If the block is dead or unpredicable, then it cannot be predicated. 712 if (BBI.IsDone || BBI.IsUnpredicable) 713 return false; 714 715 // If it is already predicated, check if its predicate subsumes the new 716 // predicate. 717 if (BBI.Predicate.size() && !TII->SubsumesPredicate(BBI.Predicate, Pred)) 718 return false; 719 720 if (BBI.BrCond.size()) { 721 if (!isTriangle) 722 return false; 723 724 // Test predicate subsumption. 725 SmallVector<MachineOperand, 4> RevPred(Pred.begin(), Pred.end()); 726 SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end()); 727 if (RevBranch) { 728 if (TII->ReverseBranchCondition(Cond)) 729 return false; 730 } 731 if (TII->ReverseBranchCondition(RevPred) || 732 !TII->SubsumesPredicate(Cond, RevPred)) 733 return false; 734 } 735 736 return true; 737 } 738 739 /// AnalyzeBlock - Analyze the structure of the sub-CFG starting from 740 /// the specified block. Record its successors and whether it looks like an 741 /// if-conversion candidate. 742 IfConverter::BBInfo &IfConverter::AnalyzeBlock(MachineBasicBlock *BB, 743 std::vector<IfcvtToken*> &Tokens) { 744 BBInfo &BBI = BBAnalysis[BB->getNumber()]; 745 746 if (BBI.IsAnalyzed || BBI.IsBeingAnalyzed) 747 return BBI; 748 749 BBI.BB = BB; 750 BBI.IsBeingAnalyzed = true; 751 752 ScanInstructions(BBI); 753 754 // Unanalyzable or ends with fallthrough or unconditional branch, or if is not 755 // considered for ifcvt anymore. 756 if (!BBI.IsBrAnalyzable || BBI.BrCond.empty() || BBI.IsDone) { 757 BBI.IsBeingAnalyzed = false; 758 BBI.IsAnalyzed = true; 759 return BBI; 760 } 761 762 // Do not ifcvt if either path is a back edge to the entry block. 763 if (BBI.TrueBB == BB || BBI.FalseBB == BB) { 764 BBI.IsBeingAnalyzed = false; 765 BBI.IsAnalyzed = true; 766 return BBI; 767 } 768 769 // Do not ifcvt if true and false fallthrough blocks are the same. 770 if (!BBI.FalseBB) { 771 BBI.IsBeingAnalyzed = false; 772 BBI.IsAnalyzed = true; 773 return BBI; 774 } 775 776 BBInfo &TrueBBI = AnalyzeBlock(BBI.TrueBB, Tokens); 777 BBInfo &FalseBBI = AnalyzeBlock(BBI.FalseBB, Tokens); 778 779 if (TrueBBI.IsDone && FalseBBI.IsDone) { 780 BBI.IsBeingAnalyzed = false; 781 BBI.IsAnalyzed = true; 782 return BBI; 783 } 784 785 SmallVector<MachineOperand, 4> RevCond(BBI.BrCond.begin(), BBI.BrCond.end()); 786 bool CanRevCond = !TII->ReverseBranchCondition(RevCond); 787 788 unsigned Dups = 0; 789 unsigned Dups2 = 0; 790 bool TNeedSub = TrueBBI.Predicate.size() > 0; 791 bool FNeedSub = FalseBBI.Predicate.size() > 0; 792 bool Enqueued = false; 793 794 BranchProbability Prediction = MBPI->getEdgeProbability(BB, TrueBBI.BB); 795 796 if (CanRevCond && ValidDiamond(TrueBBI, FalseBBI, Dups, Dups2) && 797 MeetIfcvtSizeLimit(*TrueBBI.BB, (TrueBBI.NonPredSize - (Dups + Dups2) + 798 TrueBBI.ExtraCost), TrueBBI.ExtraCost2, 799 *FalseBBI.BB, (FalseBBI.NonPredSize - (Dups + Dups2) + 800 FalseBBI.ExtraCost),FalseBBI.ExtraCost2, 801 Prediction) && 802 FeasibilityAnalysis(TrueBBI, BBI.BrCond) && 803 FeasibilityAnalysis(FalseBBI, RevCond)) { 804 // Diamond: 805 // EBB 806 // / \_ 807 // | | 808 // TBB FBB 809 // \ / 810 // TailBB 811 // Note TailBB can be empty. 812 Tokens.push_back(new IfcvtToken(BBI, ICDiamond, TNeedSub|FNeedSub, Dups, 813 Dups2)); 814 Enqueued = true; 815 } 816 817 if (ValidTriangle(TrueBBI, FalseBBI, false, Dups, Prediction) && 818 MeetIfcvtSizeLimit(*TrueBBI.BB, TrueBBI.NonPredSize + TrueBBI.ExtraCost, 819 TrueBBI.ExtraCost2, Prediction) && 820 FeasibilityAnalysis(TrueBBI, BBI.BrCond, true)) { 821 // Triangle: 822 // EBB 823 // | \_ 824 // | | 825 // | TBB 826 // | / 827 // FBB 828 Tokens.push_back(new IfcvtToken(BBI, ICTriangle, TNeedSub, Dups)); 829 Enqueued = true; 830 } 831 832 if (ValidTriangle(TrueBBI, FalseBBI, true, Dups, Prediction) && 833 MeetIfcvtSizeLimit(*TrueBBI.BB, TrueBBI.NonPredSize + TrueBBI.ExtraCost, 834 TrueBBI.ExtraCost2, Prediction) && 835 FeasibilityAnalysis(TrueBBI, BBI.BrCond, true, true)) { 836 Tokens.push_back(new IfcvtToken(BBI, ICTriangleRev, TNeedSub, Dups)); 837 Enqueued = true; 838 } 839 840 if (ValidSimple(TrueBBI, Dups, Prediction) && 841 MeetIfcvtSizeLimit(*TrueBBI.BB, TrueBBI.NonPredSize + TrueBBI.ExtraCost, 842 TrueBBI.ExtraCost2, Prediction) && 843 FeasibilityAnalysis(TrueBBI, BBI.BrCond)) { 844 // Simple (split, no rejoin): 845 // EBB 846 // | \_ 847 // | | 848 // | TBB---> exit 849 // | 850 // FBB 851 Tokens.push_back(new IfcvtToken(BBI, ICSimple, TNeedSub, Dups)); 852 Enqueued = true; 853 } 854 855 if (CanRevCond) { 856 // Try the other path... 857 if (ValidTriangle(FalseBBI, TrueBBI, false, Dups, 858 Prediction.getCompl()) && 859 MeetIfcvtSizeLimit(*FalseBBI.BB, 860 FalseBBI.NonPredSize + FalseBBI.ExtraCost, 861 FalseBBI.ExtraCost2, Prediction.getCompl()) && 862 FeasibilityAnalysis(FalseBBI, RevCond, true)) { 863 Tokens.push_back(new IfcvtToken(BBI, ICTriangleFalse, FNeedSub, Dups)); 864 Enqueued = true; 865 } 866 867 if (ValidTriangle(FalseBBI, TrueBBI, true, Dups, 868 Prediction.getCompl()) && 869 MeetIfcvtSizeLimit(*FalseBBI.BB, 870 FalseBBI.NonPredSize + FalseBBI.ExtraCost, 871 FalseBBI.ExtraCost2, Prediction.getCompl()) && 872 FeasibilityAnalysis(FalseBBI, RevCond, true, true)) { 873 Tokens.push_back(new IfcvtToken(BBI, ICTriangleFRev, FNeedSub, Dups)); 874 Enqueued = true; 875 } 876 877 if (ValidSimple(FalseBBI, Dups, Prediction.getCompl()) && 878 MeetIfcvtSizeLimit(*FalseBBI.BB, 879 FalseBBI.NonPredSize + FalseBBI.ExtraCost, 880 FalseBBI.ExtraCost2, Prediction.getCompl()) && 881 FeasibilityAnalysis(FalseBBI, RevCond)) { 882 Tokens.push_back(new IfcvtToken(BBI, ICSimpleFalse, FNeedSub, Dups)); 883 Enqueued = true; 884 } 885 } 886 887 BBI.IsEnqueued = Enqueued; 888 BBI.IsBeingAnalyzed = false; 889 BBI.IsAnalyzed = true; 890 return BBI; 891 } 892 893 /// AnalyzeBlocks - Analyze all blocks and find entries for all if-conversion 894 /// candidates. 895 void IfConverter::AnalyzeBlocks(MachineFunction &MF, 896 std::vector<IfcvtToken*> &Tokens) { 897 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) { 898 MachineBasicBlock *BB = I; 899 AnalyzeBlock(BB, Tokens); 900 } 901 902 // Sort to favor more complex ifcvt scheme. 903 std::stable_sort(Tokens.begin(), Tokens.end(), IfcvtTokenCmp); 904 } 905 906 /// canFallThroughTo - Returns true either if ToBB is the next block after BB or 907 /// that all the intervening blocks are empty (given BB can fall through to its 908 /// next block). 909 static bool canFallThroughTo(MachineBasicBlock *BB, MachineBasicBlock *ToBB) { 910 MachineFunction::iterator PI = BB; 911 MachineFunction::iterator I = llvm::next(PI); 912 MachineFunction::iterator TI = ToBB; 913 MachineFunction::iterator E = BB->getParent()->end(); 914 while (I != TI) { 915 // Check isSuccessor to avoid case where the next block is empty, but 916 // it's not a successor. 917 if (I == E || !I->empty() || !PI->isSuccessor(I)) 918 return false; 919 PI = I++; 920 } 921 return true; 922 } 923 924 /// InvalidatePreds - Invalidate predecessor BB info so it would be re-analyzed 925 /// to determine if it can be if-converted. If predecessor is already enqueued, 926 /// dequeue it! 927 void IfConverter::InvalidatePreds(MachineBasicBlock *BB) { 928 for (MachineBasicBlock::pred_iterator PI = BB->pred_begin(), 929 E = BB->pred_end(); PI != E; ++PI) { 930 BBInfo &PBBI = BBAnalysis[(*PI)->getNumber()]; 931 if (PBBI.IsDone || PBBI.BB == BB) 932 continue; 933 PBBI.IsAnalyzed = false; 934 PBBI.IsEnqueued = false; 935 } 936 } 937 938 /// InsertUncondBranch - Inserts an unconditional branch from BB to ToBB. 939 /// 940 static void InsertUncondBranch(MachineBasicBlock *BB, MachineBasicBlock *ToBB, 941 const TargetInstrInfo *TII) { 942 DebugLoc dl; // FIXME: this is nowhere 943 SmallVector<MachineOperand, 0> NoCond; 944 TII->InsertBranch(*BB, ToBB, NULL, NoCond, dl); 945 } 946 947 /// RemoveExtraEdges - Remove true / false edges if either / both are no longer 948 /// successors. 949 void IfConverter::RemoveExtraEdges(BBInfo &BBI) { 950 MachineBasicBlock *TBB = NULL, *FBB = NULL; 951 SmallVector<MachineOperand, 4> Cond; 952 if (!TII->AnalyzeBranch(*BBI.BB, TBB, FBB, Cond)) 953 BBI.BB->CorrectExtraCFGEdges(TBB, FBB, !Cond.empty()); 954 } 955 956 /// InitPredRedefs / UpdatePredRedefs - Defs by predicated instructions are 957 /// modeled as read + write (sort like two-address instructions). These 958 /// routines track register liveness and add implicit uses to if-converted 959 /// instructions to conform to the model. 960 static void InitPredRedefs(MachineBasicBlock *BB, SmallSet<unsigned,4> &Redefs, 961 const TargetRegisterInfo *TRI) { 962 for (MachineBasicBlock::livein_iterator I = BB->livein_begin(), 963 E = BB->livein_end(); I != E; ++I) { 964 unsigned Reg = *I; 965 Redefs.insert(Reg); 966 for (const unsigned *Subreg = TRI->getSubRegisters(Reg); 967 *Subreg; ++Subreg) 968 Redefs.insert(*Subreg); 969 } 970 } 971 972 static void UpdatePredRedefs(MachineInstr *MI, SmallSet<unsigned,4> &Redefs, 973 const TargetRegisterInfo *TRI, 974 bool AddImpUse = false) { 975 SmallVector<unsigned, 4> Defs; 976 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { 977 const MachineOperand &MO = MI->getOperand(i); 978 if (!MO.isReg()) 979 continue; 980 unsigned Reg = MO.getReg(); 981 if (!Reg) 982 continue; 983 if (MO.isDef()) 984 Defs.push_back(Reg); 985 else if (MO.isKill()) { 986 Redefs.erase(Reg); 987 for (const unsigned *SR = TRI->getSubRegisters(Reg); *SR; ++SR) 988 Redefs.erase(*SR); 989 } 990 } 991 for (unsigned i = 0, e = Defs.size(); i != e; ++i) { 992 unsigned Reg = Defs[i]; 993 if (Redefs.count(Reg)) { 994 if (AddImpUse) 995 // Treat predicated update as read + write. 996 MI->addOperand(MachineOperand::CreateReg(Reg, false/*IsDef*/, 997 true/*IsImp*/,false/*IsKill*/)); 998 } else { 999 Redefs.insert(Reg); 1000 for (const unsigned *SR = TRI->getSubRegisters(Reg); *SR; ++SR) 1001 Redefs.insert(*SR); 1002 } 1003 } 1004 } 1005 1006 static void UpdatePredRedefs(MachineBasicBlock::iterator I, 1007 MachineBasicBlock::iterator E, 1008 SmallSet<unsigned,4> &Redefs, 1009 const TargetRegisterInfo *TRI) { 1010 while (I != E) { 1011 UpdatePredRedefs(I, Redefs, TRI); 1012 ++I; 1013 } 1014 } 1015 1016 /// IfConvertSimple - If convert a simple (split, no rejoin) sub-CFG. 1017 /// 1018 bool IfConverter::IfConvertSimple(BBInfo &BBI, IfcvtKind Kind) { 1019 BBInfo &TrueBBI = BBAnalysis[BBI.TrueBB->getNumber()]; 1020 BBInfo &FalseBBI = BBAnalysis[BBI.FalseBB->getNumber()]; 1021 BBInfo *CvtBBI = &TrueBBI; 1022 BBInfo *NextBBI = &FalseBBI; 1023 1024 SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end()); 1025 if (Kind == ICSimpleFalse) 1026 std::swap(CvtBBI, NextBBI); 1027 1028 if (CvtBBI->IsDone || 1029 (CvtBBI->CannotBeCopied && CvtBBI->BB->pred_size() > 1)) { 1030 // Something has changed. It's no longer safe to predicate this block. 1031 BBI.IsAnalyzed = false; 1032 CvtBBI->IsAnalyzed = false; 1033 return false; 1034 } 1035 1036 if (Kind == ICSimpleFalse) 1037 if (TII->ReverseBranchCondition(Cond)) 1038 assert(false && "Unable to reverse branch condition!"); 1039 1040 // Initialize liveins to the first BB. These are potentiall redefined by 1041 // predicated instructions. 1042 SmallSet<unsigned, 4> Redefs; 1043 InitPredRedefs(CvtBBI->BB, Redefs, TRI); 1044 InitPredRedefs(NextBBI->BB, Redefs, TRI); 1045 1046 if (CvtBBI->BB->pred_size() > 1) { 1047 BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB); 1048 // Copy instructions in the true block, predicate them, and add them to 1049 // the entry block. 1050 CopyAndPredicateBlock(BBI, *CvtBBI, Cond, Redefs); 1051 } else { 1052 PredicateBlock(*CvtBBI, CvtBBI->BB->end(), Cond, Redefs); 1053 1054 // Merge converted block into entry block. 1055 BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB); 1056 MergeBlocks(BBI, *CvtBBI); 1057 } 1058 1059 bool IterIfcvt = true; 1060 if (!canFallThroughTo(BBI.BB, NextBBI->BB)) { 1061 InsertUncondBranch(BBI.BB, NextBBI->BB, TII); 1062 BBI.HasFallThrough = false; 1063 // Now ifcvt'd block will look like this: 1064 // BB: 1065 // ... 1066 // t, f = cmp 1067 // if t op 1068 // b BBf 1069 // 1070 // We cannot further ifcvt this block because the unconditional branch 1071 // will have to be predicated on the new condition, that will not be 1072 // available if cmp executes. 1073 IterIfcvt = false; 1074 } 1075 1076 RemoveExtraEdges(BBI); 1077 1078 // Update block info. BB can be iteratively if-converted. 1079 if (!IterIfcvt) 1080 BBI.IsDone = true; 1081 InvalidatePreds(BBI.BB); 1082 CvtBBI->IsDone = true; 1083 1084 // FIXME: Must maintain LiveIns. 1085 return true; 1086 } 1087 1088 /// IfConvertTriangle - If convert a triangle sub-CFG. 1089 /// 1090 bool IfConverter::IfConvertTriangle(BBInfo &BBI, IfcvtKind Kind) { 1091 BBInfo &TrueBBI = BBAnalysis[BBI.TrueBB->getNumber()]; 1092 BBInfo &FalseBBI = BBAnalysis[BBI.FalseBB->getNumber()]; 1093 BBInfo *CvtBBI = &TrueBBI; 1094 BBInfo *NextBBI = &FalseBBI; 1095 DebugLoc dl; // FIXME: this is nowhere 1096 1097 SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end()); 1098 if (Kind == ICTriangleFalse || Kind == ICTriangleFRev) 1099 std::swap(CvtBBI, NextBBI); 1100 1101 if (CvtBBI->IsDone || 1102 (CvtBBI->CannotBeCopied && CvtBBI->BB->pred_size() > 1)) { 1103 // Something has changed. It's no longer safe to predicate this block. 1104 BBI.IsAnalyzed = false; 1105 CvtBBI->IsAnalyzed = false; 1106 return false; 1107 } 1108 1109 if (Kind == ICTriangleFalse || Kind == ICTriangleFRev) 1110 if (TII->ReverseBranchCondition(Cond)) 1111 assert(false && "Unable to reverse branch condition!"); 1112 1113 if (Kind == ICTriangleRev || Kind == ICTriangleFRev) { 1114 if (ReverseBranchCondition(*CvtBBI)) { 1115 // BB has been changed, modify its predecessors (except for this 1116 // one) so they don't get ifcvt'ed based on bad intel. 1117 for (MachineBasicBlock::pred_iterator PI = CvtBBI->BB->pred_begin(), 1118 E = CvtBBI->BB->pred_end(); PI != E; ++PI) { 1119 MachineBasicBlock *PBB = *PI; 1120 if (PBB == BBI.BB) 1121 continue; 1122 BBInfo &PBBI = BBAnalysis[PBB->getNumber()]; 1123 if (PBBI.IsEnqueued) { 1124 PBBI.IsAnalyzed = false; 1125 PBBI.IsEnqueued = false; 1126 } 1127 } 1128 } 1129 } 1130 1131 // Initialize liveins to the first BB. These are potentially redefined by 1132 // predicated instructions. 1133 SmallSet<unsigned, 4> Redefs; 1134 InitPredRedefs(CvtBBI->BB, Redefs, TRI); 1135 InitPredRedefs(NextBBI->BB, Redefs, TRI); 1136 1137 bool HasEarlyExit = CvtBBI->FalseBB != NULL; 1138 if (CvtBBI->BB->pred_size() > 1) { 1139 BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB); 1140 // Copy instructions in the true block, predicate them, and add them to 1141 // the entry block. 1142 CopyAndPredicateBlock(BBI, *CvtBBI, Cond, Redefs, true); 1143 } else { 1144 // Predicate the 'true' block after removing its branch. 1145 CvtBBI->NonPredSize -= TII->RemoveBranch(*CvtBBI->BB); 1146 PredicateBlock(*CvtBBI, CvtBBI->BB->end(), Cond, Redefs); 1147 1148 // Now merge the entry of the triangle with the true block. 1149 BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB); 1150 MergeBlocks(BBI, *CvtBBI, false); 1151 } 1152 1153 // If 'true' block has a 'false' successor, add an exit branch to it. 1154 if (HasEarlyExit) { 1155 SmallVector<MachineOperand, 4> RevCond(CvtBBI->BrCond.begin(), 1156 CvtBBI->BrCond.end()); 1157 if (TII->ReverseBranchCondition(RevCond)) 1158 assert(false && "Unable to reverse branch condition!"); 1159 TII->InsertBranch(*BBI.BB, CvtBBI->FalseBB, NULL, RevCond, dl); 1160 BBI.BB->addSuccessor(CvtBBI->FalseBB); 1161 } 1162 1163 // Merge in the 'false' block if the 'false' block has no other 1164 // predecessors. Otherwise, add an unconditional branch to 'false'. 1165 bool FalseBBDead = false; 1166 bool IterIfcvt = true; 1167 bool isFallThrough = canFallThroughTo(BBI.BB, NextBBI->BB); 1168 if (!isFallThrough) { 1169 // Only merge them if the true block does not fallthrough to the false 1170 // block. By not merging them, we make it possible to iteratively 1171 // ifcvt the blocks. 1172 if (!HasEarlyExit && 1173 NextBBI->BB->pred_size() == 1 && !NextBBI->HasFallThrough) { 1174 MergeBlocks(BBI, *NextBBI); 1175 FalseBBDead = true; 1176 } else { 1177 InsertUncondBranch(BBI.BB, NextBBI->BB, TII); 1178 BBI.HasFallThrough = false; 1179 } 1180 // Mixed predicated and unpredicated code. This cannot be iteratively 1181 // predicated. 1182 IterIfcvt = false; 1183 } 1184 1185 RemoveExtraEdges(BBI); 1186 1187 // Update block info. BB can be iteratively if-converted. 1188 if (!IterIfcvt) 1189 BBI.IsDone = true; 1190 InvalidatePreds(BBI.BB); 1191 CvtBBI->IsDone = true; 1192 if (FalseBBDead) 1193 NextBBI->IsDone = true; 1194 1195 // FIXME: Must maintain LiveIns. 1196 return true; 1197 } 1198 1199 /// IfConvertDiamond - If convert a diamond sub-CFG. 1200 /// 1201 bool IfConverter::IfConvertDiamond(BBInfo &BBI, IfcvtKind Kind, 1202 unsigned NumDups1, unsigned NumDups2) { 1203 BBInfo &TrueBBI = BBAnalysis[BBI.TrueBB->getNumber()]; 1204 BBInfo &FalseBBI = BBAnalysis[BBI.FalseBB->getNumber()]; 1205 MachineBasicBlock *TailBB = TrueBBI.TrueBB; 1206 // True block must fall through or end with an unanalyzable terminator. 1207 if (!TailBB) { 1208 if (blockAlwaysFallThrough(TrueBBI)) 1209 TailBB = FalseBBI.TrueBB; 1210 assert((TailBB || !TrueBBI.IsBrAnalyzable) && "Unexpected!"); 1211 } 1212 1213 if (TrueBBI.IsDone || FalseBBI.IsDone || 1214 TrueBBI.BB->pred_size() > 1 || 1215 FalseBBI.BB->pred_size() > 1) { 1216 // Something has changed. It's no longer safe to predicate these blocks. 1217 BBI.IsAnalyzed = false; 1218 TrueBBI.IsAnalyzed = false; 1219 FalseBBI.IsAnalyzed = false; 1220 return false; 1221 } 1222 1223 // Put the predicated instructions from the 'true' block before the 1224 // instructions from the 'false' block, unless the true block would clobber 1225 // the predicate, in which case, do the opposite. 1226 BBInfo *BBI1 = &TrueBBI; 1227 BBInfo *BBI2 = &FalseBBI; 1228 SmallVector<MachineOperand, 4> RevCond(BBI.BrCond.begin(), BBI.BrCond.end()); 1229 if (TII->ReverseBranchCondition(RevCond)) 1230 assert(false && "Unable to reverse branch condition!"); 1231 SmallVector<MachineOperand, 4> *Cond1 = &BBI.BrCond; 1232 SmallVector<MachineOperand, 4> *Cond2 = &RevCond; 1233 1234 // Figure out the more profitable ordering. 1235 bool DoSwap = false; 1236 if (TrueBBI.ClobbersPred && !FalseBBI.ClobbersPred) 1237 DoSwap = true; 1238 else if (TrueBBI.ClobbersPred == FalseBBI.ClobbersPred) { 1239 if (TrueBBI.NonPredSize > FalseBBI.NonPredSize) 1240 DoSwap = true; 1241 } 1242 if (DoSwap) { 1243 std::swap(BBI1, BBI2); 1244 std::swap(Cond1, Cond2); 1245 } 1246 1247 // Remove the conditional branch from entry to the blocks. 1248 BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB); 1249 1250 // Initialize liveins to the first BB. These are potentially redefined by 1251 // predicated instructions. 1252 SmallSet<unsigned, 4> Redefs; 1253 InitPredRedefs(BBI1->BB, Redefs, TRI); 1254 1255 // Remove the duplicated instructions at the beginnings of both paths. 1256 MachineBasicBlock::iterator DI1 = BBI1->BB->begin(); 1257 MachineBasicBlock::iterator DI2 = BBI2->BB->begin(); 1258 MachineBasicBlock::iterator DIE1 = BBI1->BB->end(); 1259 MachineBasicBlock::iterator DIE2 = BBI2->BB->end(); 1260 // Skip dbg_value instructions 1261 while (DI1 != DIE1 && DI1->isDebugValue()) 1262 ++DI1; 1263 while (DI2 != DIE2 && DI2->isDebugValue()) 1264 ++DI2; 1265 BBI1->NonPredSize -= NumDups1; 1266 BBI2->NonPredSize -= NumDups1; 1267 1268 // Skip past the dups on each side separately since there may be 1269 // differing dbg_value entries. 1270 for (unsigned i = 0; i < NumDups1; ++DI1) { 1271 if (!DI1->isDebugValue()) 1272 ++i; 1273 } 1274 while (NumDups1 != 0) { 1275 ++DI2; 1276 if (!DI2->isDebugValue()) 1277 --NumDups1; 1278 } 1279 1280 UpdatePredRedefs(BBI1->BB->begin(), DI1, Redefs, TRI); 1281 BBI.BB->splice(BBI.BB->end(), BBI1->BB, BBI1->BB->begin(), DI1); 1282 BBI2->BB->erase(BBI2->BB->begin(), DI2); 1283 1284 // Predicate the 'true' block after removing its branch. 1285 BBI1->NonPredSize -= TII->RemoveBranch(*BBI1->BB); 1286 DI1 = BBI1->BB->end(); 1287 for (unsigned i = 0; i != NumDups2; ) { 1288 // NumDups2 only counted non-dbg_value instructions, so this won't 1289 // run off the head of the list. 1290 assert (DI1 != BBI1->BB->begin()); 1291 --DI1; 1292 // skip dbg_value instructions 1293 if (!DI1->isDebugValue()) 1294 ++i; 1295 } 1296 BBI1->BB->erase(DI1, BBI1->BB->end()); 1297 PredicateBlock(*BBI1, BBI1->BB->end(), *Cond1, Redefs); 1298 1299 // Predicate the 'false' block. 1300 BBI2->NonPredSize -= TII->RemoveBranch(*BBI2->BB); 1301 DI2 = BBI2->BB->end(); 1302 while (NumDups2 != 0) { 1303 // NumDups2 only counted non-dbg_value instructions, so this won't 1304 // run off the head of the list. 1305 assert (DI2 != BBI2->BB->begin()); 1306 --DI2; 1307 // skip dbg_value instructions 1308 if (!DI2->isDebugValue()) 1309 --NumDups2; 1310 } 1311 PredicateBlock(*BBI2, DI2, *Cond2, Redefs); 1312 1313 // Merge the true block into the entry of the diamond. 1314 MergeBlocks(BBI, *BBI1, TailBB == 0); 1315 MergeBlocks(BBI, *BBI2, TailBB == 0); 1316 1317 // If the if-converted block falls through or unconditionally branches into 1318 // the tail block, and the tail block does not have other predecessors, then 1319 // fold the tail block in as well. Otherwise, unless it falls through to the 1320 // tail, add a unconditional branch to it. 1321 if (TailBB) { 1322 BBInfo TailBBI = BBAnalysis[TailBB->getNumber()]; 1323 bool CanMergeTail = !TailBBI.HasFallThrough; 1324 // There may still be a fall-through edge from BBI1 or BBI2 to TailBB; 1325 // check if there are any other predecessors besides those. 1326 unsigned NumPreds = TailBB->pred_size(); 1327 if (NumPreds > 1) 1328 CanMergeTail = false; 1329 else if (NumPreds == 1 && CanMergeTail) { 1330 MachineBasicBlock::pred_iterator PI = TailBB->pred_begin(); 1331 if (*PI != BBI1->BB && *PI != BBI2->BB) 1332 CanMergeTail = false; 1333 } 1334 if (CanMergeTail) { 1335 MergeBlocks(BBI, TailBBI); 1336 TailBBI.IsDone = true; 1337 } else { 1338 BBI.BB->addSuccessor(TailBB); 1339 InsertUncondBranch(BBI.BB, TailBB, TII); 1340 BBI.HasFallThrough = false; 1341 } 1342 } 1343 1344 // RemoveExtraEdges won't work if the block has an unanalyzable branch, 1345 // which can happen here if TailBB is unanalyzable and is merged, so 1346 // explicitly remove BBI1 and BBI2 as successors. 1347 BBI.BB->removeSuccessor(BBI1->BB); 1348 BBI.BB->removeSuccessor(BBI2->BB); 1349 RemoveExtraEdges(BBI); 1350 1351 // Update block info. 1352 BBI.IsDone = TrueBBI.IsDone = FalseBBI.IsDone = true; 1353 InvalidatePreds(BBI.BB); 1354 1355 // FIXME: Must maintain LiveIns. 1356 return true; 1357 } 1358 1359 /// PredicateBlock - Predicate instructions from the start of the block to the 1360 /// specified end with the specified condition. 1361 void IfConverter::PredicateBlock(BBInfo &BBI, 1362 MachineBasicBlock::iterator E, 1363 SmallVectorImpl<MachineOperand> &Cond, 1364 SmallSet<unsigned, 4> &Redefs) { 1365 for (MachineBasicBlock::iterator I = BBI.BB->begin(); I != E; ++I) { 1366 if (I->isDebugValue() || TII->isPredicated(I)) 1367 continue; 1368 if (!TII->PredicateInstruction(I, Cond)) { 1369 #ifndef NDEBUG 1370 dbgs() << "Unable to predicate " << *I << "!\n"; 1371 #endif 1372 llvm_unreachable(0); 1373 } 1374 1375 // If the predicated instruction now redefines a register as the result of 1376 // if-conversion, add an implicit kill. 1377 UpdatePredRedefs(I, Redefs, TRI, true); 1378 } 1379 1380 std::copy(Cond.begin(), Cond.end(), std::back_inserter(BBI.Predicate)); 1381 1382 BBI.IsAnalyzed = false; 1383 BBI.NonPredSize = 0; 1384 1385 ++NumIfConvBBs; 1386 } 1387 1388 /// CopyAndPredicateBlock - Copy and predicate instructions from source BB to 1389 /// the destination block. Skip end of block branches if IgnoreBr is true. 1390 void IfConverter::CopyAndPredicateBlock(BBInfo &ToBBI, BBInfo &FromBBI, 1391 SmallVectorImpl<MachineOperand> &Cond, 1392 SmallSet<unsigned, 4> &Redefs, 1393 bool IgnoreBr) { 1394 MachineFunction &MF = *ToBBI.BB->getParent(); 1395 1396 for (MachineBasicBlock::iterator I = FromBBI.BB->begin(), 1397 E = FromBBI.BB->end(); I != E; ++I) { 1398 const MCInstrDesc &MCID = I->getDesc(); 1399 // Do not copy the end of the block branches. 1400 if (IgnoreBr && MCID.isBranch()) 1401 break; 1402 1403 MachineInstr *MI = MF.CloneMachineInstr(I); 1404 ToBBI.BB->insert(ToBBI.BB->end(), MI); 1405 ToBBI.NonPredSize++; 1406 unsigned ExtraPredCost = 0; 1407 unsigned NumCycles = TII->getInstrLatency(InstrItins, &*I, &ExtraPredCost); 1408 if (NumCycles > 1) 1409 ToBBI.ExtraCost += NumCycles-1; 1410 ToBBI.ExtraCost2 += ExtraPredCost; 1411 1412 if (!TII->isPredicated(I) && !MI->isDebugValue()) { 1413 if (!TII->PredicateInstruction(MI, Cond)) { 1414 #ifndef NDEBUG 1415 dbgs() << "Unable to predicate " << *I << "!\n"; 1416 #endif 1417 llvm_unreachable(0); 1418 } 1419 } 1420 1421 // If the predicated instruction now redefines a register as the result of 1422 // if-conversion, add an implicit kill. 1423 UpdatePredRedefs(MI, Redefs, TRI, true); 1424 } 1425 1426 if (!IgnoreBr) { 1427 std::vector<MachineBasicBlock *> Succs(FromBBI.BB->succ_begin(), 1428 FromBBI.BB->succ_end()); 1429 MachineBasicBlock *NBB = getNextBlock(FromBBI.BB); 1430 MachineBasicBlock *FallThrough = FromBBI.HasFallThrough ? NBB : NULL; 1431 1432 for (unsigned i = 0, e = Succs.size(); i != e; ++i) { 1433 MachineBasicBlock *Succ = Succs[i]; 1434 // Fallthrough edge can't be transferred. 1435 if (Succ == FallThrough) 1436 continue; 1437 ToBBI.BB->addSuccessor(Succ); 1438 } 1439 } 1440 1441 std::copy(FromBBI.Predicate.begin(), FromBBI.Predicate.end(), 1442 std::back_inserter(ToBBI.Predicate)); 1443 std::copy(Cond.begin(), Cond.end(), std::back_inserter(ToBBI.Predicate)); 1444 1445 ToBBI.ClobbersPred |= FromBBI.ClobbersPred; 1446 ToBBI.IsAnalyzed = false; 1447 1448 ++NumDupBBs; 1449 } 1450 1451 /// MergeBlocks - Move all instructions from FromBB to the end of ToBB. 1452 /// This will leave FromBB as an empty block, so remove all of its 1453 /// successor edges except for the fall-through edge. If AddEdges is true, 1454 /// i.e., when FromBBI's branch is being moved, add those successor edges to 1455 /// ToBBI. 1456 void IfConverter::MergeBlocks(BBInfo &ToBBI, BBInfo &FromBBI, bool AddEdges) { 1457 ToBBI.BB->splice(ToBBI.BB->end(), 1458 FromBBI.BB, FromBBI.BB->begin(), FromBBI.BB->end()); 1459 1460 std::vector<MachineBasicBlock *> Succs(FromBBI.BB->succ_begin(), 1461 FromBBI.BB->succ_end()); 1462 MachineBasicBlock *NBB = getNextBlock(FromBBI.BB); 1463 MachineBasicBlock *FallThrough = FromBBI.HasFallThrough ? NBB : NULL; 1464 1465 for (unsigned i = 0, e = Succs.size(); i != e; ++i) { 1466 MachineBasicBlock *Succ = Succs[i]; 1467 // Fallthrough edge can't be transferred. 1468 if (Succ == FallThrough) 1469 continue; 1470 FromBBI.BB->removeSuccessor(Succ); 1471 if (AddEdges) 1472 ToBBI.BB->addSuccessor(Succ); 1473 } 1474 1475 // Now FromBBI always falls through to the next block! 1476 if (NBB && !FromBBI.BB->isSuccessor(NBB)) 1477 FromBBI.BB->addSuccessor(NBB); 1478 1479 std::copy(FromBBI.Predicate.begin(), FromBBI.Predicate.end(), 1480 std::back_inserter(ToBBI.Predicate)); 1481 FromBBI.Predicate.clear(); 1482 1483 ToBBI.NonPredSize += FromBBI.NonPredSize; 1484 ToBBI.ExtraCost += FromBBI.ExtraCost; 1485 ToBBI.ExtraCost2 += FromBBI.ExtraCost2; 1486 FromBBI.NonPredSize = 0; 1487 FromBBI.ExtraCost = 0; 1488 FromBBI.ExtraCost2 = 0; 1489 1490 ToBBI.ClobbersPred |= FromBBI.ClobbersPred; 1491 ToBBI.HasFallThrough = FromBBI.HasFallThrough; 1492 ToBBI.IsAnalyzed = false; 1493 FromBBI.IsAnalyzed = false; 1494 } 1495
