| /toolchain/binutils/binutils-2.25/include/opcode/ |
| arc.h | 65 /* This insn is a conditional branch. */
143 /* This operand is a relative branch displacement. The disassembler
147 /* This operand is an absolute branch address. The disassembler
287 #define ARC_DELAY_JUMP 2 /* delay slot only if branch taken */
|
| hppa.h | 34 * on the direction of the branch and its success or failure.
97 n nullification for branch instructions
99 w 12 bit branch displacement
100 W 17 bit branch displacement (PC relative)
101 X 22 bit branch displacement (PC relative)
102 z 17 bit branch displacement (just a number, not an address)
153 L ,%r2 completer for new syntax branch
189 cp branch link and push completer
190 cP branch pop completer
191 cl branch link complete
[all...] |
| /toolchain/binutils/binutils-2.25/ld/testsuite/ld-cris/ |
| libdso-12.d | 8 # Check for common DSO contents; load of GOT register, branch to
|
| /external/llvm/lib/Transforms/Scalar/ |
| LoopUnswitch.cpp | 421 // which will cause the branch to go away in one loop and the condition to
781 /// Emit a conditional branch on two values if LIC == Val, branch to TrueDst,
782 /// otherwise branch to FalseDest. Insert the code immediately before InsertPt.
788 // Insert a conditional branch on LIC to the two preheaders. The original
801 // Insert the new branch.
812 /// Given a loop that has a trivial unswitchable condition in it (a cond branch
815 /// doesn't involve any code duplication, just moving the conditional branch
827 // to insert the conditional branch. We will change loopPreheader to have a
828 // conditional branch on Cond
[all...] |
| /external/libpcap/ |
| optimize.c | 94 * branch movement.
1222 * and the block ends with a conditional branch, we obviously
1223 * can't eliminate it, as the branch depends on that value.
1224 * For the index register, the conditional branch only depends
1245 * Set up values for branch optimizer.
1302 * The operands of the branch instructions are
1304 * branch was taken to get here, otherwise false.
1311 * came down the true branch, and it was an equality
1314 * I.e., if we came down the true branch, and the branch
[all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| AMDILCFGStructurizer.cpp | 252 /// BB with backward-edge could have move instructions after the branch
585 case AMDGPU::BRANCH:
732 // Remove unconditional branch instr.
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Transforms/Utils/ |
| InlineFunction.cpp | 111 // doesn't terminate in an unconditional branch, just fail. More
121 BranchInst *branch = dyn_cast<BranchInst>(&exnBlock->back()); local
122 if (!branch || branch->isConditional()) return 0;
124 BasicBlock *successor = branch->getSuccessor(0);
207 // Redirect the last dominated branch there.
308 /// a simple branch. When there is more than one predecessor, we need to
330 /// [LIBUNWIND] Get or create a target for the branch out of rewritten calls to
397 /// at the end of the given block, as a branch to the inner unwind
419 // Make a branch
[all...] |
| /prebuilts/go/darwin-x86/src/cmd/compile/internal/ppc64/ |
| ssa.go | 23 ssa.OpPPC64FLessThan: ppc64.ABLT, // 1 branch for FCMP
24 ssa.OpPPC64FGreaterThan: ppc64.ABGT, // 1 branch for FCMP
524 case ssa.OpPPC64FLessEqual, // These include a second branch for EQ -- dealing with NaN prevents REL= to !REL conversion
856 s.Branches = append(s.Branches, gc.Branch{P: p, B: b.Succs[1].Block()})
860 s.Branches = append(s.Branches, gc.Branch{P: p, B: b.Succs[0].Block()})
867 s.Branches = append(s.Branches, gc.Branch{P: p, B: b.Succs[0].Block()})
892 s.Branches = append(s.Branches, gc.Branch{P: p, B: b.Succs[1].Block()})
894 // TODO: The second branch is probably predict-not-taken since it is for FP unordered
897 s.Branches = append(s.Branches, gc.Branch{P: q, B: b.Succs[1].Block()})
902 s.Branches = append(s.Branches, gc.Branch{P: p, B: b.Succs[0].Block()}
[all...] |
| /prebuilts/go/linux-x86/src/cmd/compile/internal/ppc64/ |
| ssa.go | 23 ssa.OpPPC64FLessThan: ppc64.ABLT, // 1 branch for FCMP
24 ssa.OpPPC64FGreaterThan: ppc64.ABGT, // 1 branch for FCMP
524 case ssa.OpPPC64FLessEqual, // These include a second branch for EQ -- dealing with NaN prevents REL= to !REL conversion
856 s.Branches = append(s.Branches, gc.Branch{P: p, B: b.Succs[1].Block()})
860 s.Branches = append(s.Branches, gc.Branch{P: p, B: b.Succs[0].Block()})
867 s.Branches = append(s.Branches, gc.Branch{P: p, B: b.Succs[0].Block()})
892 s.Branches = append(s.Branches, gc.Branch{P: p, B: b.Succs[1].Block()})
894 // TODO: The second branch is probably predict-not-taken since it is for FP unordered
897 s.Branches = append(s.Branches, gc.Branch{P: q, B: b.Succs[1].Block()})
902 s.Branches = append(s.Branches, gc.Branch{P: p, B: b.Succs[0].Block()}
[all...] |
| /external/clang/lib/Analysis/ |
| UninitializedValues.cpp | 657 UninitUse::Branch Branch;
658 Branch.Terminator = Label;
659 Branch.Output = 0; // Ignored.
660 Use.addUninitBranch(Branch);
662 UninitUse::Branch Branch;
663 Branch.Terminator = Term;
664 Branch.Output = I - Block->succ_begin();
665 Use.addUninitBranch(Branch);
[all...] |
| /external/llvm/include/llvm/MC/ |
| MCInstrDesc.h | 105 Branch,
222 /// a basic block. Typically this is things like return and branch
230 /// indirect branch. Predicates below can be used to discriminate between
233 bool isBranch() const { return Flags & (1 << MCID::Branch); }
235 /// \brief Return true if this is an indirect branch, such as a
236 /// branch through a register.
239 /// \brief Return true if this is a branch which may fall
242 /// information about this branch.
247 /// \brief Return true if this is a branch which always
250 /// about this branch
[all...] |
| /external/v8/src/mips64/ |
| assembler-mips64.h | 405 // Takes a branch opcode (cc) and a label (L) and generates
406 // either a backward branch or a forward branch and links it
410 // j(cc, &L); // forward branch to unbound label
412 // j(cc, &L); // backward branch to bound label
421 // Determines if Label is bound and near enough so that branch instruction
437 // Returns the branch offset to the given label from the current code
466 // Read/Modify the code target address in the branch/call instruction at pc.
500 // This sets the branch destination (which gets loaded at the call address).
603 // --------Branch-and-jump-instructions---------
[all...] |
| /toolchain/binutils/binutils-2.25/cpu/ |
| fr30.cpu | 86 (unit u-cti "Branch Unit" ()
[all...] |
| /art/test/003-omnibus-opcodes/src/ |
| Compare.java | 41 /* try a branch-taken */
89 /* try a branch-taken */
|
| /art/test/480-checker-dead-blocks/src/ |
| Main.java | 59 // Prevent HSelect simplification by having a branch with multiple instructions.
91 // Prevent HSelect simplification by having a branch with multiple instructions.
|
| /cts/tools/vm-tests-tf/src/dot/junit/opcodes/if_eq/ |
| Test_if_eq.java | 158 * @title branch target shall be inside the method
166 * @title branch target shall not be "inside" instruction
|
| /dalvik/libdex/ |
| InstrUtils.h | 100 kInstrCanBranch = 1, // conditional or unconditional branch
169 * Returns true if the given flags represent a goto (unconditional branch).
|
| /development/ndk/platforms/android-21/arch-mips64/src/ |
| crtbegin.c | 55 * This function prepares the return address with a branch-and-link
98 * This function prepares the return address with a branch-and-link
|
| /device/linaro/bootloader/edk2/ArmPkg/Library/ArmLib/Common/Arm/ |
| ArmLibSupport.S | 131 mcr p15,0,R9,c7,c5,6 @ BPIALL Invalidate Branch predictor array. R9 == NoOp
139 mcr p15,0,R9,c7,c5,6 @ BPIALL Invalidate Branch predictor array. R9 == NoOp
|
| ArmLibSupport.asm | 105 mcr p15,0,R9,c7,c5,6 // BPIALL Invalidate Branch predictor array. R9 == NoOp
113 mcr p15,0,R9,c7,c5,6 // BPIALL Invalidate Branch predictor array. R9 == NoOp
|
| /docs/source.android.com/src/source/ |
| initializing.jd | 32 <h2 id="choosing-a-branch">Choosing a Branch</h2>
37 (called <code>master</code>), in which case you will simply omit the branch specification
39 <p>Once you have selected a branch, follow the appropriate instructions below to
48 branch, a 64-bit environment is required. Older versions can be
56 <p>The <code>master</code> branch of Android in the <a
241 including the <code>master</code> branch.</p>
254 branch in a modern Mac OS environment is very straightforward. Earlier
|
| /external/arm-neon-tests/ |
| InitCache.s | 43 ORR r0, r0, #(0x1 <<11) ; Enable all forms of branch prediction
44 ;BIC r0, r0, #(0x1 << 11) ; Disable all forms of branch prediction
|
| /external/autotest/site_utils/ |
| test_push.py | 7 """Tool to validate code in prod branch before pushing to lab.
9 The script runs push_to_prod suite to verify code in prod branch is ready to be
13 To verify if prod branch can be pushed to lab, run following command in
555 """push prod-next branch to the tested HEAD after all tests pass.
562 # prod-next branch for every repo is downloaded under PUSH_USER home dir.
569 print 'Pushing %s prod-next branch to %s' % (repo_name, test_hash)
635 # All tests pass, push prod-next branch for UPDATED_REPOS.
662 message = ('\nAll tests are completed successfully, the prod branch of the '
|
| /external/autotest/utils/ |
| build_externals.py | 109 help='Update chromite to master branch, rather than '
161 @param use_chromite_master: True if updating chromite to master branch.
|
| /external/boringssl/src/ |
| INCORPORATING.md | 10 `master-with-bazel` branch. That branch is maintained by a bot from `master`
|
