| /prebuilts/go/darwin-x86/src/net/ |
| udpsock.go | 99 err = &OpError{Op: "read", Net: c.fd.net, Source: c.fd.laddr, Addr: c.fd.raddr, Err: err}
111 err = &OpError{Op: "read", Net: c.fd.net, Source: c.fd.laddr, Addr: c.fd.raddr, Err: err}
130 err = &OpError{Op: "read", Net: c.fd.net, Source: c.fd.laddr, Addr: c.fd.raddr, Err: err}
148 err = &OpError{Op: "write", Net: c.fd.net, Source: c.fd.laddr, Addr: addr.opAddr(), Err: err}
160 return 0, &OpError{Op: "write", Net: c.fd.net, Source: c.fd.laddr, Addr: addr, Err: syscall.EINVAL}
164 err = &OpError{Op: "write", Net: c.fd.net, Source: c.fd.laddr, Addr: a.opAddr(), Err: err}
180 err = &OpError{Op: "write", Net: c.fd.net, Source: c.fd.laddr, Addr: addr.opAddr(), Err: err}
194 return nil, &OpError{Op: "dial", Net: net, Source: laddr.opAddr(), Addr: raddr.opAddr(), Err: UnknownNetworkError(net)}
197 return nil, &OpError{Op: "dial", Net: net, Source: laddr.opAddr(), Addr: nil, Err: errMissingAddress}
201 return nil, &OpError{Op: "dial", Net: net, Source: laddr.opAddr(), Addr: raddr.opAddr(), Err: err
[all...] |
| /prebuilts/go/linux-x86/src/net/ |
| udpsock.go | 99 err = &OpError{Op: "read", Net: c.fd.net, Source: c.fd.laddr, Addr: c.fd.raddr, Err: err}
111 err = &OpError{Op: "read", Net: c.fd.net, Source: c.fd.laddr, Addr: c.fd.raddr, Err: err}
130 err = &OpError{Op: "read", Net: c.fd.net, Source: c.fd.laddr, Addr: c.fd.raddr, Err: err}
148 err = &OpError{Op: "write", Net: c.fd.net, Source: c.fd.laddr, Addr: addr.opAddr(), Err: err}
160 return 0, &OpError{Op: "write", Net: c.fd.net, Source: c.fd.laddr, Addr: addr, Err: syscall.EINVAL}
164 err = &OpError{Op: "write", Net: c.fd.net, Source: c.fd.laddr, Addr: a.opAddr(), Err: err}
180 err = &OpError{Op: "write", Net: c.fd.net, Source: c.fd.laddr, Addr: addr.opAddr(), Err: err}
194 return nil, &OpError{Op: "dial", Net: net, Source: laddr.opAddr(), Addr: raddr.opAddr(), Err: UnknownNetworkError(net)}
197 return nil, &OpError{Op: "dial", Net: net, Source: laddr.opAddr(), Addr: nil, Err: errMissingAddress}
201 return nil, &OpError{Op: "dial", Net: net, Source: laddr.opAddr(), Addr: raddr.opAddr(), Err: err
[all...] |
| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| ARMAddressingModes.h | 41 static inline const char *getAddrOpcStr(AddrOpc Op) {
42 return Op == sub ? "-" : "";
45 static inline const char *getShiftOpcStr(ShiftOpc Op) {
46 switch (Op) {
56 static inline unsigned getShiftOpcEncoding(ShiftOpc Op) {
57 switch (Op) {
115 static inline unsigned getSORegOffset(unsigned Op) {
116 return Op >> 3;
118 static inline ShiftOpc getSORegShOp(unsigned Op) {
119 return (ShiftOpc)(Op & 7)
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonSplitDouble.cpp | 187 for (auto &Op : MI->operands()) {
188 if (!Op.isReg())
190 unsigned R = Op.getReg();
230 MachineOperand &Op = *U;
231 MachineInstr *UseI = Op.getParent();
237 if (&MO == &Op || !MO.isReg() || MO.getSubReg())
305 for (const auto &Op : MI->operands())
306 if (!Op.getSubReg())
396 for (auto &Op : UseI->operands()) {
397 if (Op.isReg() && Part.count(Op.getReg())
[all...] |
| HexagonBlockRanges.cpp | 312 for (auto &Op : In.operands()) {
313 if (!Op.isReg() || !Op.isUse() || Op.isUndef())
315 RegisterRef R = { Op.getReg(), Op.getSubReg() };
318 bool IsKill = Op.isKill();
326 for (auto &Op : In.operands()) {
327 if (!Op.isReg() || !Op.isDef() || Op.isUndef()
[all...] |
| /prebuilts/go/darwin-x86/src/cmd/vendor/golang.org/x/arch/ppc64/ppc64asm/ |
| gnu.go | 17 if inst.Op == 0 {
20 buf.WriteString(inst.Op.String())
49 if isLoadStoreOp(inst.Op) && argIndex == 1 && arg == R0 {
54 if arg == CR0 && strings.HasPrefix(inst.Op.String(), "cmp") {
94 // isLoadStoreOp returns true if op is a load or store instruction
95 func isLoadStoreOp(op Op) bool {
96 switch op {
|
| /prebuilts/go/linux-x86/src/cmd/vendor/golang.org/x/arch/ppc64/ppc64asm/ |
| gnu.go | 17 if inst.Op == 0 {
20 buf.WriteString(inst.Op.String())
49 if isLoadStoreOp(inst.Op) && argIndex == 1 && arg == R0 {
54 if arg == CR0 && strings.HasPrefix(inst.Op.String(), "cmp") {
94 // isLoadStoreOp returns true if op is a load or store instruction
95 func isLoadStoreOp(op Op) bool {
96 switch op {
|
| /external/clang/lib/Sema/ |
| SemaCast.cpp | 247 CastOperation Op(*this, DestType, E);
248 Op.OpRange = SourceRange(OpLoc, Parens.getEnd());
249 Op.DestRange = AngleBrackets;
256 Op.CheckConstCast();
257 if (Op.SrcExpr.isInvalid())
260 return Op.complete(CXXConstCastExpr::Create(Context, Op.ResultType,
261 Op.ValueKind, Op.SrcExpr.get(), DestTInfo,
267 Op.CheckDynamicCast()
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/Blackfin/ |
| BlackfinISelLowering.cpp | 145 SDValue BlackfinTargetLowering::LowerGlobalAddress(SDValue Op,
147 DebugLoc DL = Op.getDebugLoc();
148 const GlobalValue *GV = cast<GlobalAddressSDNode>(Op)->getGlobal();
150 Op = DAG.getTargetGlobalAddress(GV, DL, MVT::i32);
151 return DAG.getNode(BFISD::Wrapper, DL, MVT::i32, Op);
154 SDValue BlackfinTargetLowering::LowerJumpTable(SDValue Op,
156 DebugLoc DL = Op.getDebugLoc();
157 int JTI = cast<JumpTableSDNode>(Op)->getIndex();
159 Op = DAG.getTargetJumpTable(JTI, MVT::i32);
160 return DAG.getNode(BFISD::Wrapper, DL, MVT::i32, Op);
[all...] |
| /external/skia/src/gpu/ |
| GrAuditTrail.cpp | 13 void GrAuditTrail::addOp(const GrOp* op, GrGpuResource::UniqueID renderTargetID) {
15 Op* auditOp = new Op;
17 auditOp->fName = op->name();
18 auditOp->fBounds = op->bounds();
45 // We use the op pointer as a key to find the OpNode we are 'glomming' ops onto
46 fIDLookup.set(op->uniqueID(), auditOp->fOpListID);
48 opNode->fBounds = op->bounds();
54 // Look up the op we are going to glom onto
61 // Look up the op which will be glomme
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/InstPrinter/ |
| PPCInstPrinter.cpp | 93 assert(Modifier && "Must specify 'cc' or 'reg' as predicate op modifier!");
111 "Need to specify 'cc' or 'reg' as predicate op modifier!");
248 const MCOperand &Op = MI->getOperand(OpNo);
249 if (Op.isReg()) {
250 const char *RegName = getRegisterName(Op.getReg());
259 if (Op.isImm()) {
260 O << Op.getImm();
264 assert(Op.isExpr() && "unknown operand kind in printOperand");
265 O << *Op.getExpr();
|
| /prebuilts/go/darwin-x86/src/cmd/compile/internal/ssa/ |
| func.go | 46 constants map[int64][]*Value // constants cache, keyed by constant value; users must check value's Op and Type
83 func (f *Func) newValue(op Op, t Type, b *Block, line int32) *Value {
97 v.Op = op
135 nArgs := opcodeTable[v.Op].argLen
190 func (b *Block) NewValue0(line int32, op Op, t Type) *Value {
191 v := b.Func.newValue(op, t, b, line)
198 func (b *Block) NewValue0I(line int32, op Op, t Type, auxint int64) *Value
[all...] |
| prove.go | 24 // `v op w` the set of relations is updated to exclude any
25 // relation not possible due to `v op w` being true (or false).
148 switch w.Op {
262 switch w.Op {
375 domainRelationTable = map[Op]struct {
492 if tr, has := domainRelationTable[parent.Control.Op]; has {
572 if v.Op != OpSlicemask {
576 if add.Op != OpAdd64 && add.Op != OpAdd32 {
584 if x.Op == OpConst64 || x.Op == OpConst32
[all...] |
| rewritedec64.go | 10 switch v.Op {
597 if v_0.Op != OpInt64Make {
616 if v_0.Op != OpInt64Make {
893 if v_0.Op != OpInt64Make {
938 if v_0.Op != OpInt64Make {
964 if v_1.Op != OpInt64Make {
968 if v_1_0.Op != OpConst32 {
985 if v_1.Op != OpInt64Make {
989 if v_1_0.Op != OpConst32 {
1002 // cond: hi.Op != OpConst3
[all...] |
| /prebuilts/go/linux-x86/src/cmd/compile/internal/ssa/ |
| func.go | 46 constants map[int64][]*Value // constants cache, keyed by constant value; users must check value's Op and Type
83 func (f *Func) newValue(op Op, t Type, b *Block, line int32) *Value {
97 v.Op = op
135 nArgs := opcodeTable[v.Op].argLen
190 func (b *Block) NewValue0(line int32, op Op, t Type) *Value {
191 v := b.Func.newValue(op, t, b, line)
198 func (b *Block) NewValue0I(line int32, op Op, t Type, auxint int64) *Value
[all...] |
| prove.go | 24 // `v op w` the set of relations is updated to exclude any
25 // relation not possible due to `v op w` being true (or false).
148 switch w.Op {
262 switch w.Op {
375 domainRelationTable = map[Op]struct {
492 if tr, has := domainRelationTable[parent.Control.Op]; has {
572 if v.Op != OpSlicemask {
576 if add.Op != OpAdd64 && add.Op != OpAdd32 {
584 if x.Op == OpConst64 || x.Op == OpConst32
[all...] |
| rewritedec64.go | 10 switch v.Op {
597 if v_0.Op != OpInt64Make {
616 if v_0.Op != OpInt64Make {
893 if v_0.Op != OpInt64Make {
938 if v_0.Op != OpInt64Make {
964 if v_1.Op != OpInt64Make {
968 if v_1_0.Op != OpConst32 {
985 if v_1.Op != OpInt64Make {
989 if v_1_0.Op != OpConst32 {
1002 // cond: hi.Op != OpConst3
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
| MipsISelLowering.cpp | 492 // Returns Op if setcc is not a floating point comparison.
493 static SDValue CreateFPCmp(SelectionDAG& DAG, const SDValue& Op) {
495 if (Op.getOpcode() != ISD::SETCC)
496 return Op;
498 SDValue LHS = Op.getOperand(0);
501 return Op;
503 SDValue RHS = Op.getOperand(1);
504 DebugLoc dl = Op.getDebugLoc();
508 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(2))->get();
553 // Op's first operand must be a shift right
[all...] |
| /external/llvm/utils/TableGen/ |
| CodeGenInstruction.cpp | 160 CGIOperandList::ParseOperandName(const std::string &Op, bool AllowWholeOp) {
161 if (Op.empty() || Op[0] != '$')
162 PrintFatalError(TheDef->getName() + ": Illegal operand name: '" + Op + "'");
164 std::string OpName = Op.substr(1);
172 PrintFatalError(TheDef->getName() + ": illegal empty suboperand name in '" +Op +"'");
183 " whole operand part of complex operand '" + Op + "'");
192 PrintFatalError(TheDef->getName() + ": unknown suboperand name in '" + Op + "'");
200 PrintFatalError(TheDef->getName() + ": unknown suboperand name in '" + Op + "'");
215 std::pair<unsigned,unsigned> Op = Ops.ParseOperandName(Name, false)
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| ARMISelLowering.cpp | [all...] |
| /external/clang/lib/Index/ |
| IndexBody.cpp | 105 OverloadedOperatorKind Op = CXXOp->getOperator();
106 if (Op == OO_Equal) {
108 } else if ((Op >= OO_PlusEqual && Op <= OO_PipeEqual) ||
109 Op == OO_LessLessEqual || Op == OO_GreaterGreaterEqual ||
110 Op == OO_PlusPlus || Op == OO_MinusMinus) {
113 } else if (Op == OO_Amp) {
|
| /external/llvm/include/llvm/Target/ |
| TargetLowering.h | 585 virtual bool canOpTrap(unsigned Op, EVT VT) const;
598 LegalizeAction getOperationAction(unsigned Op, EVT VT) const {
602 if (Op > array_lengthof(OpActions[0])) return Custom;
603 return OpActions[(unsigned)VT.getSimpleVT().SimpleTy][Op];
609 bool isOperationLegalOrCustom(unsigned Op, EVT VT) const {
611 (getOperationAction(Op, VT) == Legal ||
612 getOperationAction(Op, VT) == Custom);
618 bool isOperationLegalOrPromote(unsigned Op, EVT VT) const {
620 (getOperationAction(Op, VT) == Legal ||
621 getOperationAction(Op, VT) == Promote)
[all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelDAGToDAG.cpp | 106 bool SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID,
114 bool tryIndexedLoad(SDNode *Op);
115 bool tryIndexedBinOp(SDNode *Op, SDValue N1, SDValue N2, unsigned Opc8,
283 SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID,
289 if (!SelectAddr(Op, Op0, Op1))
351 bool MSP430DAGToDAGISel::tryIndexedBinOp(SDNode *Op, SDValue N1, SDValue N2,
355 IsLegalToFold(N1, Op, Op, OptLevel)) {
366 CurDAG->SelectNodeTo(Op, Opc, VT, MVT::i16, MVT::Other, Ops0);
|
| /external/llvm/lib/Target/PowerPC/InstPrinter/ |
| PPCInstPrinter.cpp | 238 "Need to specify 'cc', 'pm' or 'reg' as predicate op modifier!");
401 const MCOperand &Op = MI->getOperand(OpNo);
402 const MCSymbolRefExpr &refExp = cast<MCSymbolRefExpr>(*Op.getExpr());
434 const MCOperand &Op = MI->getOperand(OpNo);
435 if (Op.isReg()) {
436 const char *RegName = getRegisterName(Op.getReg());
445 if (Op.isImm()) {
446 O << Op.getImm();
450 assert(Op.isExpr() && "unknown operand kind in printOperand");
451 Op.getExpr()->print(O, &MAI)
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/MSP430/ |
| MSP430ISelDAGToDAG.cpp | 111 SelectInlineAsmMemoryOperand(const SDValue &Op, char ConstraintCode,
119 SDNode *SelectIndexedLoad(SDNode *Op);
120 SDNode *SelectIndexedBinOp(SDNode *Op, SDValue N1, SDValue N2,
286 SelectInlineAsmMemoryOperand(const SDValue &Op, char ConstraintCode,
292 if (!SelectAddr(Op, Op0, Op1))
353 SDNode *MSP430DAGToDAGISel::SelectIndexedBinOp(SDNode *Op,
358 IsLegalToFold(N1, Op, Op, OptLevel)) {
369 CurDAG->SelectNodeTo(Op, Opc,
|
