| /prebuilts/go/linux-x86/src/cmd/compile/internal/ssa/ |
| loopbce.go | 49 switch b.Control.Op {
61 if ind.Op != OpPhi {
67 if n := ind.Args[0]; n.Op == OpAdd64 && (n.Args[0] == ind || n.Args[1] == ind) {
69 } else if n := ind.Args[1]; n.Op == OpAdd64 && (n.Args[0] == ind || n.Args[1] == ind) {
87 if inc.Op != OpConst64 || inc.AuxInt <= 0 {
122 if w, c := dropAdd64(max); (w.Op == OpStringLen || w.Op == OpSliceLen) && 0 >= c && -c >= 0 {
130 if min.Op == OpConst64 && max.Op == OpConst64 {
141 if min.Op == OpConst64
[all...] |
| rewritegeneric.go | 10 switch v.Op {
406 if v_0.Op != OpConst16 {
411 if v_1.Op != OpConst16 {
420 // cond: x.Op != OpConst16
425 if v_1.Op != OpConst16 {
430 if !(x.Op != OpConst16) {
445 if v_0.Op != OpConst16 {
467 if v_0.Op != OpConst32 {
472 if v_1.Op != OpConst32 {
481 // cond: x.Op != OpConst3
[all...] |
| schedule.go | 52 if x.Op != OpPhi {
88 case v.Op == OpAMD64LoweredGetClosurePtr || v.Op == OpPPC64LoweredGetClosurePtr ||
89 v.Op == OpARMLoweredGetClosurePtr || v.Op == OpARM64LoweredGetClosurePtr ||
90 v.Op == Op386LoweredGetClosurePtr || v.Op == OpMIPS64LoweredGetClosurePtr ||
91 v.Op == OpS390XLoweredGetClosurePtr || v.Op == OpMIPSLoweredGetClosurePtr:
100 case v.Op == OpAMD64LoweredNilCheck || v.Op == OpPPC64LoweredNilCheck |
[all...] |
| shift_test.go | 14 checkOpcodeCounts(t, fun.f, map[Op]int{OpAMD64SHLQconst: 1, OpAMD64CMPQconst: 0, OpAMD64ANDQconst: 0})
17 checkOpcodeCounts(t, fun.f, map[Op]int{OpAMD64SHLQconst: 0, OpAMD64CMPQconst: 0, OpAMD64ANDQconst: 0})
20 checkOpcodeCounts(t, fun.f, map[Op]int{OpAMD64SHRQconst: 1, OpAMD64CMPQconst: 0, OpAMD64ANDQconst: 0})
23 checkOpcodeCounts(t, fun.f, map[Op]int{OpAMD64SHRQconst: 0, OpAMD64CMPQconst: 0, OpAMD64ANDQconst: 0})
26 checkOpcodeCounts(t, fun.f, map[Op]int{OpAMD64SARQconst: 1, OpAMD64CMPQconst: 0})
29 checkOpcodeCounts(t, fun.f, map[Op]int{OpAMD64SARQconst: 1, OpAMD64CMPQconst: 0})
33 func makeConstShiftFunc(c *Config, amount int64, op Op, typ Type) fun {
43 Valu("shift", op, typ, 0, nil, "load", "c"),
|
| /prebuilts/go/darwin-x86/src/cmd/compile/internal/ssa/ |
| rewritegeneric.go | 10 switch v.Op {
406 if v_0.Op != OpConst16 {
411 if v_1.Op != OpConst16 {
420 // cond: x.Op != OpConst16
425 if v_1.Op != OpConst16 {
430 if !(x.Op != OpConst16) {
445 if v_0.Op != OpConst16 {
467 if v_0.Op != OpConst32 {
472 if v_1.Op != OpConst32 {
481 // cond: x.Op != OpConst3
[all...] |
| schedule.go | 52 if x.Op != OpPhi {
88 case v.Op == OpAMD64LoweredGetClosurePtr || v.Op == OpPPC64LoweredGetClosurePtr ||
89 v.Op == OpARMLoweredGetClosurePtr || v.Op == OpARM64LoweredGetClosurePtr ||
90 v.Op == Op386LoweredGetClosurePtr || v.Op == OpMIPS64LoweredGetClosurePtr ||
91 v.Op == OpS390XLoweredGetClosurePtr || v.Op == OpMIPSLoweredGetClosurePtr:
100 case v.Op == OpAMD64LoweredNilCheck || v.Op == OpPPC64LoweredNilCheck |
[all...] |
| shift_test.go | 14 checkOpcodeCounts(t, fun.f, map[Op]int{OpAMD64SHLQconst: 1, OpAMD64CMPQconst: 0, OpAMD64ANDQconst: 0})
17 checkOpcodeCounts(t, fun.f, map[Op]int{OpAMD64SHLQconst: 0, OpAMD64CMPQconst: 0, OpAMD64ANDQconst: 0})
20 checkOpcodeCounts(t, fun.f, map[Op]int{OpAMD64SHRQconst: 1, OpAMD64CMPQconst: 0, OpAMD64ANDQconst: 0})
23 checkOpcodeCounts(t, fun.f, map[Op]int{OpAMD64SHRQconst: 0, OpAMD64CMPQconst: 0, OpAMD64ANDQconst: 0})
26 checkOpcodeCounts(t, fun.f, map[Op]int{OpAMD64SARQconst: 1, OpAMD64CMPQconst: 0})
29 checkOpcodeCounts(t, fun.f, map[Op]int{OpAMD64SARQconst: 1, OpAMD64CMPQconst: 0})
33 func makeConstShiftFunc(c *Config, amount int64, op Op, typ Type) fun {
43 Valu("shift", op, typ, 0, nil, "load", "c"),
|
| /cts/tests/tests/graphics/src/android/graphics/cts/ |
| RegionTest.java | 346 assertFalse(mRegion.op(rect1, Region.Op.DIFFERENCE));
347 assertFalse(mRegion.op(rect1, Region.Op.INTERSECT));
348 assertFalse(mRegion.op(rect1, Region.Op.UNION));
349 assertFalse(mRegion.op(rect1, Region.Op.XOR));
350 assertFalse(mRegion.op(rect1, Region.Op.REVERSE_DIFFERENCE))
[all...] |
| /external/llvm/lib/Target/Lanai/ |
| LanaiISelLowering.cpp | 161 SDValue LanaiTargetLowering::LowerOperation(SDValue Op,
163 switch (Op.getOpcode()) {
165 return LowerMUL(Op, DAG);
167 return LowerBR_CC(Op, DAG);
169 return LowerConstantPool(Op, DAG);
171 return LowerGlobalAddress(Op, DAG);
173 return LowerBlockAddress(Op, DAG);
175 return LowerJumpTable(Op, DAG);
177 return LowerSELECT_CC(Op, DAG);
179 return LowerSETCC(Op, DAG)
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| ARMISelLowering.h | 242 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
300 virtual bool getPostIndexedAddressParts(SDNode *N, SDNode *Op,
305 virtual void computeMaskedBitsForTargetNode(const SDValue Op,
330 virtual void LowerAsmOperandForConstraint(SDValue Op,
403 SDValue LowerEH_SJLJ_SETJMP(SDValue Op, SelectionDAG &DAG) const;
404 SDValue LowerEH_SJLJ_LONGJMP(SDValue Op, SelectionDAG &DAG) const;
405 SDValue LowerEH_SJLJ_DISPATCHSETUP(SDValue Op, SelectionDAG &DAG) const;
406 SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG,
408 SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const;
409 SDValue LowerGlobalAddressDarwin(SDValue Op, SelectionDAG &DAG) const
[all...] |
| /external/llvm/include/llvm/Analysis/ |
| ObjCARCAnalysisUtils.h | 140 inline bool IsPotentialRetainableObjPtr(const Value *Op) {
143 if (isa<Constant>(Op) || isa<AllocaInst>(Op))
146 if (const Argument *Arg = dyn_cast<Argument>(Op))
157 PointerType *Ty = dyn_cast<PointerType>(Op->getType());
165 inline bool IsPotentialRetainableObjPtr(const Value *Op,
168 if (!IsPotentialRetainableObjPtr(Op))
172 if (AA.pointsToConstantMemory(Op))
176 if (const LoadInst *LI = dyn_cast<LoadInst>(Op))
|
| /external/llvm/lib/Target/AMDGPU/ |
| SIInsertWaits.cpp | 103 bool isOpRelevant(MachineOperand &Op);
225 bool SIInsertWaits::isOpRelevant(MachineOperand &Op) {
227 if (!Op.isReg() || !TRI->isInAllocatableClass(Op.getReg()))
231 if (Op.isDef())
235 MachineInstr &MI = *Op.getParent();
250 if (Data && Op.isIdenticalTo(*Data))
256 if (Data0 && Op.isIdenticalTo(*Data0))
260 return Data1 && Op.isIdenticalTo(*Data1);
269 return Op.isIdenticalTo(*I)
[all...] |
| /external/skia/src/gpu/instanced/ |
| InstancedRendering.h | 42 * These methods make a new record internally for an instanced draw, and return an op that is
43 * effectively just an index to that record. The returned op is not self-contained, but
99 class Op : public GrDrawOp {
101 SK_DECLARE_INTERNAL_LLIST_INTERFACE(Op);
103 ~Op() override;
104 const char* name() const override { return "InstancedRendering::Op"; }
144 // Registers the op with the InstancedRendering list of tracked ops.
148 Op(uint32_t classID, GrPaint&&, InstancedRendering*);
173 typedef SkTInternalLList<Op> OpList;
182 virtual void onDraw(const GrPipeline&, const InstanceProcessor&, const Op*) = 0
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.h | 61 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
68 void computeKnownBitsForTargetNode(const SDValue Op,
84 void LowerAsmOperandForConstraint(SDValue Op,
169 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
170 SDValue LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const;
171 SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG) const;
172 SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const;
174 SDValue LowerEH_SJLJ_SETJMP(SDValue Op, SelectionDAG &DAG,
176 SDValue LowerEH_SJLJ_LONGJMP(SDValue Op, SelectionDAG &DAG,
180 SDValue withTargetFlags(SDValue Op, unsigned TF, SelectionDAG &DAG) const
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86InstrBuilder.h | 91 MachineOperand &Op = MI->getOperand(Operand);
92 if (Op.isReg()) {
94 AM.Base.Reg = Op.getReg();
97 AM.Base.FrameIndex = Op.getIndex();
99 Op = MI->getOperand(Operand + 1);
100 if (Op.isImm())
101 AM.Scale = Op.getImm();
102 Op = MI->getOperand(Operand + 2);
103 if (Op.isImm())
104 AM.IndexReg = Op.getImm()
[all...] |
| /external/llvm/utils/TableGen/ |
| CodeGenInstruction.h | 45 static ConstraintInfo getTied(unsigned Op) {
48 I.OtherTiedOperand = Op;
173 std::pair<unsigned,unsigned> ParseOperandName(const std::string &Op,
178 unsigned getFlattenedOperandNumber(std::pair<unsigned,unsigned> Op) const {
179 return OperandList[Op.first].MIOperandNo + Op.second;
184 std::pair<unsigned,unsigned> getSubOperandNumber(unsigned Op) const {
187 if (OperandList[i].MIOperandNo+OperandList[i].MINumOperands > Op)
188 return std::make_pair(i, Op-OperandList[i].MIOperandNo);
196 std::pair<unsigned,unsigned> Op = getSubOperandNumber(FlatOpNo)
[all...] |
| /external/skia/src/core/ |
| SkRasterClip.h | 20 inline void applyClipRestriction(SkRegion::Op op, SkIRect* bounds) {
21 if (op >= SkRegion::kUnion_Op && fClipRestrictionRect
42 void op(const SkRect&, const SkMatrix&, const SkIRect& limit, SkRegion::Op, bool isAA);
43 void op(const SkRRect&, const SkMatrix&, const SkIRect& limit, SkRegion::Op, bool isAA);
44 void op(const SkPath&, const SkMatrix&, const SkIRect& limit, SkRegion::Op, bool isAA);
45 void op(const SkRegion&, SkRegion::Op)
[all...] |
| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| InstrEmitter.cpp | 72 SDValue Op(Node, ResNo);
74 VRBaseMap.erase(Op);
75 bool isNew = VRBaseMap.insert(std::make_pair(Op, SrcReg)).second;
107 SDValue Op = User->getOperand(i);
108 if (Op.getNode() != Node || Op.getResNo() != ResNo)
110 EVT VT = Node->getValueType(Op.getResNo());
161 SDValue Op(Node, ResNo);
163 VRBaseMap.erase(Op);
164 bool isNew = VRBaseMap.insert(std::make_pair(Op, VRBase)).second
[all...] |
| /external/swiftshader/third_party/LLVM/utils/TableGen/ |
| CodeGenInstruction.h | 45 static ConstraintInfo getTied(unsigned Op) {
48 I.OtherTiedOperand = Op;
168 std::pair<unsigned,unsigned> ParseOperandName(const std::string &Op,
173 unsigned getFlattenedOperandNumber(std::pair<unsigned,unsigned> Op) const {
174 return OperandList[Op.first].MIOperandNo + Op.second;
179 std::pair<unsigned,unsigned> getSubOperandNumber(unsigned Op) const {
182 if (OperandList[i].MIOperandNo+OperandList[i].MINumOperands > Op)
183 return std::make_pair(i, Op-OperandList[i].MIOperandNo);
191 std::pair<unsigned,unsigned> Op = getSubOperandNumber(FlatOpNo)
[all...] |
| /prebuilts/go/darwin-x86/src/cmd/compile/internal/gc/ |
| unsafe.go | 9 switch n.Op {
19 if n.Op == OALIGNOF {
26 if n.Left.Op != OXDOT {
38 switch n.Left.Op {
52 switch r.Op {
66 Fatalf("impossible %#v node after dot insertion", r.Op)
72 Fatalf("unexpected op %v", n.Op)
|
| /prebuilts/go/linux-x86/src/cmd/compile/internal/gc/ |
| unsafe.go | 9 switch n.Op {
19 if n.Op == OALIGNOF {
26 if n.Left.Op != OXDOT {
38 switch n.Left.Op {
52 switch r.Op {
66 Fatalf("impossible %#v node after dot insertion", r.Op)
72 Fatalf("unexpected op %v", n.Op)
|
| /external/llvm/lib/Target/X86/AsmParser/ |
| X86AsmInstrumentation.cpp | 154 void AddBusyRegs(const X86Operand &Op) {
155 AddBusyReg(Op.getMemBaseReg());
156 AddBusyReg(Op.getMemIndexReg());
210 virtual void InstrumentMemOperandSmall(X86Operand &Op, unsigned AccessSize,
214 virtual void InstrumentMemOperandLarge(X86Operand &Op, unsigned AccessSize,
222 void InstrumentMemOperand(X86Operand &Op, unsigned AccessSize, bool IsWrite,
236 void EmitLEA(X86Operand &Op, unsigned Size, unsigned Reg, MCStreamer &Out) {
241 Op.addMemOperands(Inst, 5);
245 void ComputeMemOperandAddress(X86Operand &Op, unsigned Size,
251 std::unique_ptr<X86Operand> AddDisplacement(X86Operand &Op,
[all...] |
| /external/llvm/lib/Target/WebAssembly/ |
| WebAssemblyISelLowering.cpp | 81 for (auto Op : {ISD::FSIN, ISD::FCOS, ISD::FSINCOS, ISD::FPOWI, ISD::FPOW,
83 setOperationAction(Op, T, Expand);
86 for (auto Op :
88 setOperationAction(Op, T, Legal);
96 for (auto Op :
101 setOperationAction(Op, T, Expand);
120 for (auto Op : {ISD::BR_CC, ISD::SELECT_CC})
121 setOperationAction(Op, T, Expand);
526 SDValue WebAssemblyTargetLowering::LowerOperation(SDValue Op,
528 SDLoc DL(Op);
[all...] |
| /external/llvm/utils/PerfectShuffle/ |
| PerfectShuffle.cpp | 88 Operator *Op; // The Operation used to generate this value.
147 static const char *getZeroCostOpName(unsigned short Op) {
148 if (ShufTab[Op].Arg0 == 0x0123)
150 else if (ShufTab[Op].Arg0 == 0x4567)
162 std::cerr << " = " << ShufTab[ThisOp].Op->getName() << "(";
176 if (!ShufTab[Vals[ValNo]].Op->isOnlyLHSOperator()) {
222 ShufTab[0x0123].Op = nullptr;
225 ShufTab[0x4567].Op = nullptr;
304 Operator *Op = TheOperators[opnum];
306 // Evaluate op(LHS,LHS
[all...] |
| /external/swiftshader/third_party/LLVM/utils/PerfectShuffle/ |
| PerfectShuffle.cpp | 89 Operator *Op; // The Operation used to generate this value.
147 static const char *getZeroCostOpName(unsigned short Op) {
148 if (ShufTab[Op].Arg0 == 0x0123)
150 else if (ShufTab[Op].Arg0 == 0x4567)
162 std::cerr << " = " << ShufTab[ThisOp].Op->getName() << "(";
176 if (!ShufTab[Vals[ValNo]].Op->isOnlyLHSOperator()) {
222 ShufTab[0x0123].Op = 0;
225 ShufTab[0x4567].Op = 0;
304 Operator *Op = TheOperators[opnum];
306 // Evaluate op(LHS,LHS
[all...] |
