| /external/llvm/lib/Target/X86/ |
| X86WinAllocaExpander.cpp | 221 BuildMI(*MBB, I, DL, TII->get(Is64Bit ? X86::PUSH64r : X86::PUSH32r))
232 BuildMI(*MBB, I, DL, TII->get(Is64Bit ? X86::PUSH64r : X86::PUSH32r))
236 BuildMI(*MBB, I, DL, TII->get(getSubOpcode(Is64Bit, Amount)), StackPtr)
243 BuildMI(*MBB, MI, DL, TII->get(TargetOpcode::COPY), RegA)
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| SIInstrInfo.cpp | 48 BuildMI(MBB, MI, DL, get(AMDGPU::V_MOV_B32_e32), DestReg)
|
| R600InstrInfo.cpp | 58 BuildMI(MBB, MI, DL, get(AMDGPU::MOV))
71 BuildMI(MBB, MI, DL, get(AMDGPU::MOV), DestReg)
271 BuildMI(&MBB, DL, get(AMDGPU::JUMP)).addMBB(TBB).addReg(0);
279 BuildMI(&MBB, DL, get(AMDGPU::JUMP))
289 BuildMI(&MBB, DL, get(AMDGPU::JUMP))
292 BuildMI(&MBB, DL, get(AMDGPU::JUMP)).addMBB(FBB).addReg(0);
|
| /external/llvm/lib/Target/AMDGPU/ |
| SIWholeQuadMode.cpp | 338 BuildMI(MBB, Before, DebugLoc(), TII->get(AMDGPU::S_AND_SAVEEXEC_B64),
342 BuildMI(MBB, Before, DebugLoc(), TII->get(AMDGPU::S_AND_B64),
353 BuildMI(MBB, Before, DebugLoc(), TII->get(AMDGPU::COPY), AMDGPU::EXEC)
356 BuildMI(MBB, Before, DebugLoc(), TII->get(AMDGPU::S_WQM_B64),
451 BuildMI(*MI->getParent(), MI, DL, TII->get(AMDGPU::COPY), Dest)
486 BuildMI(Entry, EntryMI, DebugLoc(), TII->get(AMDGPU::COPY), LiveMaskReg)
492 BuildMI(Entry, EntryMI, DebugLoc(), TII->get(AMDGPU::S_WQM_B64),
|
| SIRegisterInfo.cpp | 286 BuildMI(*MBB, Ins, DL, TII->get(AMDGPU::V_MOV_B32_e32), BaseReg)
295 BuildMI(*MBB, Ins, DL, TII->get(AMDGPU::S_MOV_B32), OffsetReg)
297 BuildMI(*MBB, Ins, DL, TII->get(AMDGPU::V_ADD_I32_e64), BaseReg)
351 BuildMI(*MBB, MI, DL, TII->get(AMDGPU::S_MOV_B32), OffsetReg)
353 BuildMI(*MBB, MI, DL, TII->get(AMDGPU::V_ADD_I32_e64), NewReg)
457 BuildMI(*MBB, MI, DL, TII->get(AMDGPU::S_ADD_U32), SOffset)
476 BuildMI(*MBB, MI, DL, TII->get(LoadStoreOp))
489 BuildMI(*MBB, MI, DL, TII->get(AMDGPU::S_SUB_U32), ScratchOffset)
532 BuildMI(*MBB, MI, DL,
545 = BuildMI(*MBB, MI, DL, TII->get(AMDGPU::V_MOV_B32_e32), TmpReg
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ThumbRegisterInfo.cpp | 76 BuildMI(MBB, MBBI, dl, TII.get(ARM::tLDRpci))
95 BuildMI(MBB, MBBI, dl, TII.get(ARM::t2LDRpci))
147 AddDefaultT1CC(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVi8), LdReg))
151 AddDefaultT1CC(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVi8), LdReg))
154 AddDefaultT1CC(BuildMI(MBB, MBBI, dl, TII.get(ARM::tRSB), LdReg))
164 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII.get(Opc), DestReg);
304 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII.get(CopyOpc), DestReg);
321 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII.get(ExtraOpc), DestReg);
459 AddDefaultPred(BuildMI(MBB, I, DL, TII.get(ARM::tMOVr))
489 AddDefaultPred(BuildMI(MBB, UseMI, DL, TII.get(ARM::tMOVr))
[all...] |
| Thumb2InstrInfo.cpp | 120 AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::tMOVr), DestReg)
141 AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::t2STRi12))
156 MachineInstrBuilder MIB = BuildMI(MBB, I, DL, get(ARM::t2STRDi8));
183 AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::t2LDRi12), DestReg)
198 MachineInstrBuilder MIB = BuildMI(MBB, I, DL, get(ARM::t2LDRDi8));
229 BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr), DestReg)
246 BuildMI(MBB, MBBI, dl, TII.get(ARM::t2MOVi16), DestReg)
252 BuildMI(MBB, MBBI, dl, TII.get(ARM::t2MOVTi16), DestReg)
261 BuildMI(MBB, MBBI, dl, TII.get(ARM::t2SUBrr), DestReg)
272 BuildMI(MBB, MBBI, dl, TII.get(ARM::t2ADDrr), DestReg
[all...] |
| ARMInstrInfo.cpp | 124 MIB = BuildMI(MBB, MI, DL, get(ARM::MOV_ga_pcrel_ldr), Reg)
130 MIB = BuildMI(MBB, MI, DL, get(ARM::LDRi12), Reg);
|
| /external/llvm/lib/Target/SystemZ/ |
| SystemZFrameLowering.cpp | 184 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII->get(SystemZ::STMG));
254 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII->get(SystemZ::LMG));
313 MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII->get(Opcode), Reg)
355 BuildMI(MBB, MBBI, DL, ZII->get(TargetOpcode::CFI_INSTRUCTION))
369 BuildMI(MBB, MBBI, DL, ZII->get(SystemZ::LGR))
379 BuildMI(MBB, MBBI, DL, ZII->get(TargetOpcode::CFI_INSTRUCTION))
384 BuildMI(MBB, MBBI, DL, ZII->get(SystemZ::STG))
390 BuildMI(MBB, MBBI, DL, ZII->get(SystemZ::LGR), SystemZ::R11D)
397 BuildMI(MBB, MBBI, DL, ZII->get(TargetOpcode::CFI_INSTRUCTION))
433 BuildMI(MBB, MBBI, DL, ZII->get(TargetOpcode::CFI_INSTRUCTION)
[all...] |
| SystemZRegisterInfo.cpp | 131 BuildMI(MBB, MI, DL, TII->get(LAOpcode),ScratchReg)
137 BuildMI(MBB, MI, DL, TII->get(SystemZ::AGR),ScratchReg)
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| Thumb2InstrInfo.cpp | 115 AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::tMOVr), DestReg)
138 AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::t2STRi12))
166 AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::t2LDRi12), DestReg)
190 BuildMI(MBB, MBBI, dl, TII.get(ARM::t2MOVi16), DestReg)
196 BuildMI(MBB, MBBI, dl, TII.get(ARM::t2MOVTi16), DestReg)
205 BuildMI(MBB, MBBI, dl, TII.get(ARM::t2SUBrr), DestReg)
211 BuildMI(MBB, MBBI, dl, TII.get(ARM::t2ADDrr), DestReg)
226 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr),DestReg)
238 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(Opc), DestReg)
277 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(Opc), DestReg
[all...] |
| ARMExpandPseudoInsts.cpp | 417 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(),
481 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(),
530 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(),
612 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(Opc));
658 LO16 = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::MOVi), DstReg);
659 HI16 = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::ORRri))
[all...] |
| Thumb1RegisterInfo.cpp | 77 BuildMI(MBB, MBBI, dl, TII.get(ARM::tLDRpci))
116 AddDefaultT1CC(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVi8), LdReg))
119 AddDefaultT1CC(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVi8), LdReg))
121 AddDefaultT1CC(BuildMI(MBB, MBBI, dl, TII.get(ARM::tRSB), LdReg))
130 BuildMI(MBB, MBBI, dl, TII.get(Opc), DestReg);
242 AddDefaultT1CC(BuildMI(MBB, MBBI, dl, MCID, DestReg)
246 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr), DestReg)
260 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII.get(Opc), DestReg);
268 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII.get(Opc), DestReg);
291 AddDefaultPred(AddDefaultT1CC(BuildMI(MBB, MBBI, dl, MCID, DestReg)
[all...] |
| ARMFrameLowering.cpp | 206 BuildMI(MBB, MBBI, dl, TII.get(ADDriOpc), FramePtr)
267 AddDefaultCC(AddDefaultPred(BuildMI(MBB, MBBI, dl,
278 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr), ARM::R4)
280 AddDefaultCC(AddDefaultPred(BuildMI(MBB, MBBI, dl,
284 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr), ARM::SP)
298 BuildMI(MBB, MBBI, dl,
303 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr),
378 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr),
385 BuildMI(MBB, MBBI, dl, TII.get(ARM::MOVr), ARM::SP)
388 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr)
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64InstrInfo.cpp | 254 BuildMI(&MBB, DL, get(AArch64::Bcc)).addImm(Cond[0].getImm()).addMBB(TBB);
259 BuildMI(&MBB, DL, get(Cond[1].getImm())).addOperand(Cond[2]);
276 BuildMI(&MBB, DL, get(AArch64::B)).addMBB(TBB);
284 BuildMI(&MBB, DL, get(AArch64::B)).addMBB(FBB);
449 BuildMI(MBB, I, DL, get(AArch64::SUBSXri), AArch64::XZR)
455 BuildMI(MBB, I, DL, get(AArch64::SUBSWri), AArch64::WZR)
478 BuildMI(MBB, I, DL, get(AArch64::ANDSWri), AArch64::WZR)
483 BuildMI(MBB, I, DL, get(AArch64::ANDSXri), AArch64::XZR)
537 BuildMI(MBB, I, DL, get(Opc), DstReg).addReg(TrueReg).addReg(FalseReg).addImm(
[all...] |
| AArch64A53Fix835769.cpp | 175 BuildMI(I->getParent(), DL, TII->get(AArch64::HINT)).addImm(0);
179 BuildMI(MBB, MI, DL, TII->get(AArch64::HINT)).addImm(0);
|
| /external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
| MipsISelLowering.cpp | 754 BuildMI(BB, dl, TII->get(Opc)).addMBB(sinkMBB);
756 BuildMI(BB, dl, TII->get(Opc)).addReg(MI->getOperand(2).getReg())
773 BuildMI(*BB, BB->begin(), dl,
778 BuildMI(*BB, BB->begin(), dl,
[all...] |
| MipsInstrInfo.cpp | 98 BuildMI(MBB, MI, DL, get(Mips::NOP));
153 MachineInstrBuilder MIB = BuildMI(MBB, I, DL, get(Opc));
186 BuildMI(MBB, I, DL, get(Opc)).addReg(SrcReg, getKillRegState(isKill))
212 BuildMI(MBB, I, DL, get(Opc), DestReg).addFrameIndex(FI).addImm(0);
219 MachineInstrBuilder MIB = BuildMI(MF, DL, get(Mips::DBG_VALUE))
361 MachineInstrBuilder MIB = BuildMI(&MBB, DL, MCID);
388 BuildMI(&MBB, DL, get(Mips::J)).addMBB(FBB);
395 BuildMI(&MBB, DL, get(Mips::J)).addMBB(TBB);
453 BuildMI(FirstMBB, MBBI, DebugLoc(), TII->get(TargetOpcode::COPY),
|
| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| InstrEmitter.cpp | 157 BuildMI(*MBB, InsertPos, Node->getDebugLoc(), TII->get(TargetOpcode::COPY),
258 BuildMI(*MBB, InsertPos, Op.getDebugLoc(),
301 BuildMI(*MBB, InsertPos, Op.getNode()->getDebugLoc(),
419 BuildMI(*MBB, InsertPos, DL, TII->get(TargetOpcode::COPY), NewReg)
466 BuildMI(*MBB, InsertPos, Node->getDebugLoc(),
481 BuildMI(*MBB, InsertPos, Node->getDebugLoc(),
513 MachineInstr *MI = BuildMI(*MF, Node->getDebugLoc(), TII->get(Opc));
551 BuildMI(*MBB, InsertPos, Node->getDebugLoc(), TII->get(TargetOpcode::COPY),
568 MachineInstr *MI = BuildMI(*MF, Node->getDebugLoc(),
615 MachineInstrBuilder MIB = BuildMI(*MF, DL, II)
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/PTX/ |
| PTXInstrInfo.cpp | 59 MachineInstr *MI = BuildMI(MBB, I, DL, MCID, DstReg).
81 MachineInstr *MI = BuildMI(MBB, I, DL, MCID, DstReg).addReg(SrcReg);
283 BuildMI(&MBB, DL, get(PTX::BRAdp))
285 BuildMI(&MBB, DL, get(PTX::BRAd))
289 BuildMI(&MBB, DL, get(PTX::BRAdp))
293 BuildMI(&MBB, DL, get(PTX::BRAd))
|
| /external/llvm/lib/Target/MSP430/ |
| MSP430RegisterInfo.cpp | 145 BuildMI(MBB, std::next(II), dl, TII.get(MSP430::SUB16ri), DstReg)
148 BuildMI(MBB, std::next(II), dl, TII.get(MSP430::ADD16ri), DstReg)
|
| /external/llvm/lib/Target/Mips/ |
| MipsSERegisterInfo.cpp | 186 BuildMI(MBB, II, DL, TII.get(ABI.GetPtrAddiuOp()), Reg)
204 BuildMI(MBB, II, DL, TII.get(ABI.GetPtrAdduOp()), Reg).addReg(FrameReg)
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCMIPeephole.cpp | 142 BuildMI(MBB, &MI, MI.getDebugLoc(),
167 BuildMI(MBB, &MI, MI.getDebugLoc(),
|
| PPCVSXCopy.cpp | 116 BuildMI(MBB, MI, MI->getDebugLoc(),
142 BuildMI(MBB, MI, MI->getDebugLoc(),
|
| /external/llvm/lib/Target/WebAssembly/ |
| WebAssemblyLowerBrUnless.cpp | 111 BuildMI(MBB, MI, MI->getDebugLoc(), TII.get(WebAssembly::EQZ_I32), Tmp)
120 BuildMI(MBB, MI, MI->getDebugLoc(), TII.get(WebAssembly::BR_IF))
|
