| /external/llvm/lib/Target/AMDGPU/ |
| R600OptimizeVectorRegisters.cpp | 197 MachineInstr *Tmp = BuildMI(MBB, Pos, DL, TII->get(AMDGPU::INSERT_SUBREG),
215 BuildMI(MBB, Pos, DL, TII->get(AMDGPU::COPY), Reg).addReg(SrcVec);
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| R600EmitClauseMarkers.cpp | 278 BuildMI(MBB, ClauseHead, MBB.findDebugLoc(ClauseHead), TII->get(Opcode))
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| SIFixSGPRCopies.cpp | 229 BuildMI(*MI.getParent(), &MI, MI.getDebugLoc(), TII->get(AMDGPU::COPY), TmpReg)
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| R600ISelLowering.cpp | 232 NewMI = BuildMI(*BB, I, BB->findDebugLoc(I),
304 BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(MI.getOpcode()))
311 BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(MI.getOpcode()))
357 BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(AMDGPU::TEX_SET_GRADIENTS_H),
377 BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(AMDGPU::TEX_SET_GRADIENTS_V),
397 BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(AMDGPU::TEX_SAMPLE_G))
461 BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(AMDGPU::TEX_SET_GRADIENTS_H),
481 BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(AMDGPU::TEX_SET_GRADIENTS_V),
501 BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(AMDGPU::TEX_SAMPLE_C_G))
527 BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(AMDGPU::JUMP)
[all...] |
| SIShrinkInstructions.cpp | 365 BuildMI(MBB, I, MI.getDebugLoc(), TII->get(Op32));
395 // during the initial BuildMI, so find it to preserve the flags.
|
| /external/llvm/lib/Target/ARM/ |
| MLxExpansionPass.cpp | 293 MachineInstrBuilder MIB = BuildMI(MBB, MI, MI->getDebugLoc(), MCID1, TmpReg)
300 MIB = BuildMI(MBB, MI, MI->getDebugLoc(), MCID2)
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| Thumb2ITBlockPass.cpp | 201 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII->get(ARM::t2IT))
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| /external/llvm/lib/Target/X86/ |
| X86FloatingPoint.cpp | 226 BuildMI(*MBB, I, dl, TII->get(X86::XCH_F)).addReg(STReg);
236 BuildMI(*MBB, I, dl, TII->get(X86::LD_Frr)).addReg(STReg);
805 I = BuildMI(*MBB, ++I, dl, TII->get(X86::ST_FPrr)).addReg(X86::ST0);
836 return BuildMI(*MBB, I, DebugLoc(), TII->get(X86::ST_FPrr))
[all...] |
| X86VZeroUpper.cpp | 162 BuildMI(MBB, I, dl, TII->get(X86::VZEROUPPER));
|
| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| TargetInstrInfoImpl.cpp | 99 return BuildMI(MF, MI->getDebugLoc(), MI->getDesc())
104 return BuildMI(MF, MI->getDebugLoc(), MI->getDesc())
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| MachineRegisterInfo.cpp | 232 BuildMI(*EntryMBB, EntryMBB->begin(), DebugLoc(),
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| /external/llvm/lib/Target/Mips/ |
| MipsFastISel.cpp | 163 return BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc));
166 return BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc),
299 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Mips::LEA_ADDiu),
769 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), ResultReg)
820 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc))
929 BuildMI(*BrBB, FuncInfo.InsertPt, DbgLoc, TII.get(Mips::BGTZ))
[all...] |
| MipsOptimizePICCall.cpp | 136 BuildMI(*MBB, I, I->getDebugLoc(), TII.get(TargetOpcode::COPY), DstReg)
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonRegisterInfo.cpp | 200 BuildMI(MB, II, DL, HII.get(Hexagon::A2_addi), TmpR)
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| /external/llvm/lib/Target/Lanai/ |
| LanaiDelaySlotFiller.cpp | 128 BuildMI(MBB, std::next(I), DebugLoc(), TII->get(Lanai::NOP));
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| /external/llvm/lib/Target/PowerPC/ |
| PPCVSXSwapRemoval.cpp | 796 BuildMI(*MI->getParent(), InsertPoint, MI->getDebugLoc(),
[all...] |
| /external/llvm/lib/Target/WebAssembly/ |
| WebAssemblyPeephole.cpp | 92 BuildMI(MBB, MI, MI.getDebugLoc(), TII.get(CopyLocalOpc), NewReg)
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| Thumb2ITBlockPass.cpp | 184 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII->get(ARM::t2IT))
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| Thumb2SizeReduction.cpp | 445 MachineInstrBuilder MIB = BuildMI(MBB, *MI, dl, TII->get(Opc));
505 MachineInstrBuilder MIB = BuildMI(MBB, *MI, MI->getDebugLoc(),
645 MachineInstrBuilder MIB = BuildMI(MBB, *MI, dl, NewMCID);
735 MachineInstrBuilder MIB = BuildMI(MBB, *MI, dl, NewMCID);
|
| /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/ |
| MBlazeDelaySlotFiller.cpp | 246 BuildMI(MBB, ++J, I->getDebugLoc(), TII->get(MBlaze::NOP));
|
| /external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
| MipsDelaySlotFiller.cpp | 110 BuildMI(MBB, llvm::next(I), I->getDebugLoc(), TII->get(Mips::NOP));
|
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | [all...] |
| /external/llvm/lib/CodeGen/ |
| GCRootLowering.cpp | 275 BuildMI(MBB, MI, DL, TII->get(TargetOpcode::GC_LABEL)).addSym(Label);
|
| MachineInstrBundle.cpp | 124 BuildMI(MF, FirstMI->getDebugLoc(), TII->get(TargetOpcode::BUNDLE));
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| MachineSSAUpdater.cpp | 119 return BuildMI(*BB, I, DebugLoc(), TII->get(Opcode), NewVR);
|
