| /external/swiftshader/third_party/LLVM/lib/Target/Sparc/ |
| SparcInstrInfo.cpp | 167 if (Opcode != SP::BCOND && Opcode != SP::FBCOND)
237 BuildMI(&MBB, DL, get(SP::BCOND)).addMBB(TBB).addImm(CC);
258 && I->getOpcode() != SP::BCOND
|
| SparcInstrInfo.td | 520 def BCOND : BranchSP<0, (ins brtarget:$dst, CCOp:$cc),
[all...] |
| /toolchain/binutils/binutils-2.25/bfd/ |
| elf32-crx.c | 953 * bal/bcond:32 -> bal/bcond:16 2 bytes
954 * bcond:16 -> bcond:8 2 bytes
[all...] |
| elf32-cr16.c | [all...] |
| /art/compiler/utils/mips64/ |
| assembler_mips64.cc | [all...] |
| /external/llvm/lib/Target/Mips/ |
| Mips16InstrInfo.td | [all...] |
| /prebuilts/go/darwin-x86/src/cmd/internal/obj/mips/ |
| asm0.go | 1021 func BCOND(x uint32, y uint32) uint32 {
[all...] |
| /prebuilts/go/linux-x86/src/cmd/internal/obj/mips/ |
| asm0.go | 1021 func BCOND(x uint32, y uint32) uint32 {
[all...] |
| /art/compiler/utils/mips/ |
| assembler_mips.cc | [all...] |
| assembler_mips.h | [all...] |
| assembler_mips32r6_test.cc | 900 // MipsAssembler::Bcond
|
| /external/llvm/lib/Target/Sparc/ |
| LeonPasses.cpp | 547 BuildMI(MBB, NextMBBI, DL, TII.get(SP::BCOND))
552 BuildMI(MBB, NextMBBI, DL, TII.get(SP::BCOND))
595 BuildMI(MBB, NextMBBI, DL, TII.get(SP::BCOND))
600 BuildMI(MBB, NextMBBI, DL, TII.get(SP::BCOND))
[all...] |
| SparcInstrInfo.cpp | 147 return Opc == SP::FBCOND || Opc == SP::BCOND;
262 BuildMI(&MBB, DL, get(SP::BCOND)).addMBB(TBB).addImm(CC);
283 && I->getOpcode() != SP::BCOND
|
| SparcInstrAliases.td | 68 (BCOND brtarget:$imm, condVal)>;
|
| SparcISelLowering.cpp | [all...] |
| /toolchain/binutils/binutils-2.25/opcodes/ |
| cr16-dis.c | 308 /* Adjust mask for bcond with 32-bit size instruction. */
332 /* Adjust mask for bcond with 32-bit size instruction */
|
| tic4x-dis.c | 514 case 'P': /* Displacement 0--15 (used by Bcond and BcondD). */
|
| v850-opc.c | [all...] |
| /toolchain/binutils/binutils-2.25/ld/testsuite/ld-arm/ |
| arm-elf.exp | 669 "-EL -Ttext=0x8f00 --fix-cortex-a8" "" "-EL" {cortex-a8-fix-blx-bcond.s}
670 {{objdump -dr cortex-a8-fix-blx-bcond.d}}
671 "cortex-a8-fix-blx-bcond"}
[all...] |
| /external/kernel-headers/original/uapi/asm-mips/asm/ |
| inst.h | 140 * rt field of bcond opcodes.
|
| /system/core/libpixelflinger/codeflinger/ |
| mips64_disassem.c | 55 /* 0 */ "spec", "bcond", "j", "jal", "beq", "bne", "blez", "bgtz",
|
| mips_disassem.c | 69 /* 0 */ "spec", "bcond","j ", "jal", "beq", "bne", "blez", "bgtz",
|
| /toolchain/binutils/binutils-2.25/include/opcode/ |
| ns32k.h | 51 p : displacement - pc relative addressing br bcond bsr cxp
|
| /toolchain/binutils/binutils-2.25/gas/config/ |
| tc-rx.c | [all...] |
| /toolchain/binutils/binutils-2.25/ld/testsuite/ |
| ChangeLog-2010 | 636 * ld-arm/arm-elf.exp (armelftests): Add cortex-a8-fix-blx-bcond.s.
637 * ld-arm/cortex-a8-fix-blx-bcond.s: New.
638 * ld-arm/cortex-a8-fix-blx-bcond.d: New.
[all...] |
