| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
| r6.s | 184 bltc $2, $3, ext
185 bltc $2, $3, . + 4 + (-32768 << 2)
186 bltc $2, $3, . + 4 + (32767 << 2)
187 bltc $2, $3, 1f
188 bltc $3, $2, 1f
|
| r6-n32.d | 334 0+03e0 <[^>]*> 5c430000 bltc v0,v1,000003e4 <[^>]*>
337 0+03e8 <[^>]*> 5c430000 bltc v0,v1,000003ec <[^>]*>
340 0+03f0 <[^>]*> 5c430000 bltc v0,v1,000003f4 <[^>]*>
343 0+03f8 <[^>]*> 5c430000 bltc v0,v1,000003fc <[^>]*>
346 0+0400 <[^>]*> 5c620000 bltc v1,v0,00000404 <[^>]*>
|
| r6.d | 333 0+03e0 <[^>]*> 5c43ffff bltc v0,v1,000003e0 <[^>]*>
336 0+03e8 <[^>]*> 5c438000 bltc v0,v1,fffe03ec <[^>]*>
339 0+03f0 <[^>]*> 5c437fff bltc v0,v1,000203f0 <[^>]*>
342 0+03f8 <[^>]*> 5c43ffff bltc v0,v1,000003f8 <[^>]*>
345 0+0400 <[^>]*> 5c62ffff bltc v1,v0,00000400 <[^>]*>
|
| r6-n64.d | 484 0+03e0 <[^>]*> 5c430000 bltc v0,v1,0+03e4 <[^>]*>
489 0+03e8 <[^>]*> 5c430000 bltc v0,v1,0+03ec <[^>]*>
494 0+03f0 <[^>]*> 5c430000 bltc v0,v1,0+03f4 <[^>]*>
499 0+03f8 <[^>]*> 5c430000 bltc v0,v1,0+03fc <[^>]*>
504 0+0400 <[^>]*> 5c620000 bltc v1,v0,0+0404 <[^>]*>
|
| /art/runtime/interpreter/mterp/mips64/ |
| header.S | 31 * idioms, which should translate into bgec and bltc respectively with swapped
39 bltc \rreg, \lreg, \target
|
| footer.S | 103 bltc rPROFILE, v0, .L_resume_backward_branch
|
| /external/llvm/lib/Target/Mips/ |
| MipsInstrInfo.cpp | 332 return Mips::BLTC;
424 case Mips::BLTC:
|
| Mips32r6InstrInfo.td | 400 class BLTC_DESC : CMP_BC_DESC_BASE<"bltc", brtarget, GPR32Opnd>;
769 def BLTC : R6MMR6Rel, BLTC_ENC, BLTC_DESC, ISA_MIPS32R6;
[all...] |
| MicroMips32r6InstrInfo.td | 62 class BLTC_MMR6_ENC : CMP_BRANCH_2R_OFF16_FM_MMR6<"bltc", 0b110001>;
284 class BLTC_MMR6_DESC : CMP_CBR_2R_MMR6_DESC_BASE<"bltc", brtarget_mm,
[all...] |
| /external/llvm/test/MC/Disassembler/Mips/mips32r6/ |
| valid-mips32r6-el.txt | 48 0x40 0x00 0xa6 0x5c # CHECK: bltc $5, $6, 260
49 0xfa 0xff 0xa6 0x5c # CHECK: bltc $5, $6, -20
|
| valid-mips32r6.txt | 164 0x5c 0xa6 0x00 0x40 # CHECK: bltc $5, $6, 260
165 0x5c 0xa6 0xff 0xfa # CHECK: bltc $5, $6, -20
|
| /external/llvm/test/MC/Disassembler/Mips/mips64r6/ |
| valid-mips64r6-el.txt | 41 0x40 0x00 0xa6 0x5c # CHECK: bltc $5, $6, 260
42 0xfa 0xff 0xa6 0x5c # CHECK: bltc $5, $6, -20
|
| valid-mips64r6.txt | 183 0x5c 0xa6 0x00 0x40 # CHECK: bltc $5, $6, 260
184 0x5c 0xa6 0xff 0xfa # CHECK: bltc $5, $6, -20
|
| /external/llvm/test/MC/Mips/mips32r6/ |
| invalid.s | 49 bltc $0, $2, local_label # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand ($zero) for instruction
55 bltc $2, $2, local_label # CHECK: :[[@LINE]]:{{[0-9]+}}: error: registers must be different
|
| valid.s | 57 bltc $5, $6, 256 # CHECK: bltc $5, $6, 256 # encoding: [0x5c,0xa6,0x00,0x40]
|
| /external/v8/src/mips/ |
| assembler-mips.h | 652 void bltc(Register rs, Register rt, int16_t offset);
653 inline void bltc(Register rs, Register rt, Label* L) {
654 bltc(rs, rt, shifted_branch_offset(L));
[all...] |
| constants-mips.h | 405 POP27 = BGTZL, // bgtzc, bltzc, bltc/bgtc
[all...] |
| /external/v8/src/mips64/ |
| assembler-mips64.h | 659 void bltc(Register rs, Register rt, int16_t offset);
660 inline void bltc(Register rs, Register rt, Label* L) {
661 bltc(rs, rt, shifted_branch_offset(L));
[all...] |
| constants-mips64.h | 388 POP27 = BGTZL, // bgtzc, bltzc, bltc/bgtc
[all...] |
| /external/llvm/test/MC/Mips/mips64r6/ |
| valid.s | 50 bltc $5, $6, 256 # CHECK: bltc $5, $6, 256 # encoding: [0x5c,0xa6,0x00,0x40]
|
| invalid.s | 51 bltc $2, $2, local_label # CHECK: :[[@LINE]]:{{[0-9]+}}: error: registers must be different
|
| /art/compiler/utils/mips64/ |
| assembler_mips64.cc | 718 void Mips64Assembler::Bltc(GpuRegister rs, GpuRegister rt, uint16_t imm16) {
804 Bltc(rs, rt, imm16_21);
813 Bltc(rt, rs, imm16_21);
[all...] |
| assembler_mips64.h | 549 void Bltc(GpuRegister rs, GpuRegister rt, uint16_t imm16);
[all...] |
| /external/llvm/lib/Target/Mips/Disassembler/ |
| MipsDisassembler.cpp | 784 // BLTC if rs != rt && rs != 0 && rt != 0
[all...] |
| /external/llvm/test/MC/Mips/micromips32r6/ |
| valid.s | 26 bltc $3,$4, 16 # CHECK: bltc $3, $4, 16 # encoding: [0xc4,0x83,0x00,0x08]
[all...] |
