| /external/llvm/test/MC/Disassembler/Mips/mips32r6/ |
| valid-xfail-mips32r6.txt | 8 0x60 0x40 0x00 0x01 # CHECK: bnvc $0, $2, 4
9 0x60 0x82 0x00 0x01 # CHECK: bnvc $2, $4, 4
|
| valid-mips32r6-el.txt | 52 0x01 0x00 0x00 0x60 # CHECK: bnvc $zero, $zero, 8
53 0x01 0x00 0x40 0x60 # CHECK: bnvc $2, $zero, 8
54 0x01 0x00 0x82 0x60 # CHECK: bnvc $4, $2, 8
|
| valid-mips32r6.txt | 166 0x60 0x00 0x00 0x01 # CHECK: bnvc $zero, $zero, 8
169 0x60 0x40 0x00 0x01 # CHECK: bnvc $2, $zero, 8
170 0x60 0x82 0x00 0x01 # CHECK: bnvc $4, $2, 8
|
| /external/llvm/test/MC/Disassembler/Mips/mips64r6/ |
| valid-xfail-mips64r6.txt | 8 0x60 0x40 0x00 0x01 # CHECK: bnvc $0, $2, 8
9 0x60 0x82 0x00 0x01 # CHECK: bnvc $2, $4, 8
|
| valid-mips64r6-el.txt | 54 0x01 0x00 0x40 0x60 # CHECK: bnvc $2, $zero, 8
55 0x01 0x00 0x82 0x60 # CHECK: bnvc $4, $2, 8
56 0x01 0x00 0x00 0x60 # CHECK: bnvc $zero, $zero, 8
|
| valid-mips64r6.txt | 185 0x60 0x00 0x00 0x01 # CHECK: bnvc $zero, $zero, 8
188 0x60 0x40 0x00 0x01 # CHECK: bnvc $2, $zero, 8
189 0x60 0x82 0x00 0x01 # CHECK: bnvc $4, $2, 8
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
| r6.s | 142 bnvc $0, $0, ext
143 bnvc $2, $0, ext
144 bnvc $0, $2, ext
145 bnvc $2, $4, ext
146 bnvc $4, $2, ext
147 bnvc $2, $4, . + 4 + (-32768 << 2)
148 bnvc $2, $4, . + 4 + (32767 << 2)
149 bnvc $2, $4, 1f
150 bnvc $2, $2, ext
151 bnvc $2, $2, . + 4 + (-32768 << 2
[all...] |
| r6-n32.d | 214 0+02a0 <[^>]*> 60000000 bnvc zero,zero,000002a4 <[^>]*>
217 0+02a8 <[^>]*> 60400000 bnvc v0,zero,000002ac <[^>]*>
220 0+02b0 <[^>]*> 60400000 bnvc v0,zero,000002b4 <[^>]*>
223 0+02b8 <[^>]*> 60820000 bnvc a0,v0,000002bc <[^>]*>
226 0+02c0 <[^>]*> 60820000 bnvc a0,v0,000002c4 <[^>]*>
229 0+02c8 <[^>]*> 60820000 bnvc a0,v0,000002cc <[^>]*>
232 0+02d0 <[^>]*> 60820000 bnvc a0,v0,000002d4 <[^>]*>
235 0+02d8 <[^>]*> 60820000 bnvc a0,v0,000002dc <[^>]*>
238 0+02e0 <[^>]*> 60420000 bnvc v0,v0,000002e4 <[^>]*>
241 0+02e8 <[^>]*> 60420000 bnvc v0,v0,000002ec <[^>]*
[all...] |
| r6.d | 213 0+02a0 <[^>]*> 6000ffff bnvc zero,zero,000002a0 <[^>]*>
216 0+02a8 <[^>]*> 6040ffff bnvc v0,zero,000002a8 <[^>]*>
219 0+02b0 <[^>]*> 6040ffff bnvc v0,zero,000002b0 <[^>]*>
222 0+02b8 <[^>]*> 6082ffff bnvc a0,v0,000002b8 <[^>]*>
225 0+02c0 <[^>]*> 6082ffff bnvc a0,v0,000002c0 <[^>]*>
228 0+02c8 <[^>]*> 60828000 bnvc a0,v0,fffe02cc <[^>]*>
231 0+02d0 <[^>]*> 60827fff bnvc a0,v0,000202d0 <[^>]*>
234 0+02d8 <[^>]*> 6082ffff bnvc a0,v0,000002d8 <[^>]*>
237 0+02e0 <[^>]*> 6042ffff bnvc v0,v0,000002e0 <[^>]*>
240 0+02e8 <[^>]*> 60428000 bnvc v0,v0,fffe02ec <[^>]*
[all...] |
| r6-n64.d | 284 0+02a0 <[^>]*> 60000000 bnvc zero,zero,0+02a4 <[^>]*>
289 0+02a8 <[^>]*> 60400000 bnvc v0,zero,0+02ac <[^>]*>
294 0+02b0 <[^>]*> 60400000 bnvc v0,zero,0+02b4 <[^>]*>
299 0+02b8 <[^>]*> 60820000 bnvc a0,v0,0+02bc <[^>]*>
304 0+02c0 <[^>]*> 60820000 bnvc a0,v0,0+02c4 <[^>]*>
309 0+02c8 <[^>]*> 60820000 bnvc a0,v0,0+02cc <[^>]*>
314 0+02d0 <[^>]*> 60820000 bnvc a0,v0,0+02d4 <[^>]*>
319 0+02d8 <[^>]*> 60820000 bnvc a0,v0,0+02dc <[^>]*>
324 0+02e0 <[^>]*> 60420000 bnvc v0,v0,0+02e4 <[^>]*>
329 0+02e8 <[^>]*> 60420000 bnvc v0,v0,0+02ec <[^>]*
[all...] |
| /external/llvm/test/MC/Mips/mips32r6/ |
| valid.s | 40 # bnec requires rs < rt && rs != 0 but we accept this and fix it. See also bnvc.
59 # bnvc requires that rs >= rt but we accept both and fix this. See also bnec.
60 bnvc $0, $0, 4 # CHECK: bnvc $zero, $zero, 4 # encoding: [0x60,0x00,0x00,0x01]
61 bnvc $2, $0, 4 # CHECK: bnvc $2, $zero, 4 # encoding: [0x60,0x40,0x00,0x01]
62 bnvc $2, $4, 4 # CHECK: bnvc $2, $4, 4 # encoding: [0x60,0x82,0x00,0x01]
|
| /external/llvm/test/MC/Mips/mips64r6/ |
| valid.s | 54 # bnec requires rs < rt && rs != 0 but we accept this and fix it. See also bnvc.
59 # bnvc requires that rs >= rt but we accept both and fix this. See also bnec.
60 bnvc $0, $0, 4 # CHECK: bnvc $zero, $zero, 4 # encoding: [0x60,0x00,0x00,0x01]
61 bnvc $2, $0, 4 # CHECK: bnvc $2, $zero, 4 # encoding: [0x60,0x40,0x00,0x01]
62 bnvc $2, $4, 4 # CHECK: bnvc $2, $4, 4 # encoding: [0x60,0x82,0x00,0x01]
|
| /external/llvm/test/MC/Mips/micromips32r6/ |
| valid.s | 348 bnvc $2, $4, 24 # CHECK: bnvc $2, $4, 24 # encoding: [0x7c,0x44,0x00,0x0c]
349 bnvc $4, $2, 24 # CHECK: bnvc $4, $2, 24 # encoding: [0x7c,0x44,0x00,0x0c]
[all...] |
| /external/v8/src/mips/ |
| assembler-mips.h | 701 void bnvc(Register rs, Register rt, int16_t offset);
702 inline void bnvc(Register rs, Register rt, Label* L) {
703 bnvc(rs, rt, shifted_branch_offset(L));
[all...] |
| constants-mips.h | 406 POP30 = DADDI, // bnezalc, bnvc, bnec
[all...] |
| disasm-mips.cc | [all...] |
| macro-assembler-mips.cc | 1035 bnvc(rs, rt, &skip);
1043 void MacroAssembler::Bnvc(Register rs, Register rt, Label* L) {
1050 bnvc(rs, rt, L);
[all...] |
| /external/v8/src/mips64/ |
| assembler-mips64.h | 708 void bnvc(Register rs, Register rt, int16_t offset);
709 inline void bnvc(Register rs, Register rt, Label* L) {
710 bnvc(rs, rt, shifted_branch_offset(L));
[all...] |
| constants-mips64.h | 389 POP30 = DADDI, // bnezalc, bnvc, bnec
[all...] |
| disasm-mips64.cc | [all...] |
| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| MipsMCCodeEmitter.cpp | 136 } else if (Inst.getOpcode() == Mips::BNVC || Inst.getOpcode() == Mips::BOVC) {
215 case Mips::BNVC:
[all...] |
| /external/llvm/lib/Target/Mips/ |
| Mips32r6InstrInfo.td | 435 class BNVC_DESC : CMP_BC_DESC_BASE<"bnvc", brtarget, GPR32Opnd>;
777 def BNVC : R6MMR6Rel, BNVC_ENC, BNVC_DESC, ISA_MIPS32R6;
[all...] |
| MicroMips32r6InstrInfo.td | 204 class BNVC_MMR6_ENC : POP37_BNVC_FM_MMR6<"bnvc">;
[all...] |
| /external/llvm/lib/Target/Mips/Disassembler/ |
| MipsDisassembler.cpp | 668 // BNVC if rs >= rt
678 MI.setOpcode(Mips::BNVC);
[all...] |
| /external/llvm/test/MC/Disassembler/Mips/micromips32r6/ |
| valid.txt | 323 0x7c 0x44 0x00 0x0c # CHECK: bnvc $2, $4, 24
|
