1 /* 2 * Copyright (C) 2011 The Android Open Source Project 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 17 #ifndef ART_RUNTIME_ARCH_X86_CONTEXT_X86_H_ 18 #define ART_RUNTIME_ARCH_X86_CONTEXT_X86_H_ 19 20 #include "arch/context.h" 21 #include "base/logging.h" 22 #include "base/macros.h" 23 #include "registers_x86.h" 24 25 namespace art { 26 namespace x86 { 27 28 class X86Context : public Context { 29 public: 30 X86Context() { 31 Reset(); 32 } 33 virtual ~X86Context() {} 34 35 void Reset() OVERRIDE; 36 37 void FillCalleeSaves(uint8_t* frame, const QuickMethodFrameInfo& fr) OVERRIDE; 38 39 void SetSP(uintptr_t new_sp) OVERRIDE { 40 SetGPR(ESP, new_sp); 41 } 42 43 void SetPC(uintptr_t new_pc) OVERRIDE { 44 eip_ = new_pc; 45 } 46 47 void SetArg0(uintptr_t new_arg0_value) OVERRIDE { 48 SetGPR(EAX, new_arg0_value); 49 } 50 51 bool IsAccessibleGPR(uint32_t reg) OVERRIDE { 52 DCHECK_LT(reg, static_cast<uint32_t>(kNumberOfCpuRegisters)); 53 return gprs_[reg] != nullptr; 54 } 55 56 uintptr_t* GetGPRAddress(uint32_t reg) OVERRIDE { 57 DCHECK_LT(reg, static_cast<uint32_t>(kNumberOfCpuRegisters)); 58 return gprs_[reg]; 59 } 60 61 uintptr_t GetGPR(uint32_t reg) OVERRIDE { 62 DCHECK_LT(reg, static_cast<uint32_t>(kNumberOfCpuRegisters)); 63 DCHECK(IsAccessibleGPR(reg)); 64 return *gprs_[reg]; 65 } 66 67 void SetGPR(uint32_t reg, uintptr_t value) OVERRIDE; 68 69 bool IsAccessibleFPR(uint32_t reg) OVERRIDE { 70 DCHECK_LT(reg, static_cast<uint32_t>(kNumberOfFloatRegisters)); 71 return fprs_[reg] != nullptr; 72 } 73 74 uintptr_t GetFPR(uint32_t reg) OVERRIDE { 75 DCHECK_LT(reg, static_cast<uint32_t>(kNumberOfFloatRegisters)); 76 DCHECK(IsAccessibleFPR(reg)); 77 return *fprs_[reg]; 78 } 79 80 void SetFPR(uint32_t reg, uintptr_t value) OVERRIDE; 81 82 void SmashCallerSaves() OVERRIDE; 83 NO_RETURN void DoLongJump() OVERRIDE; 84 85 private: 86 // Pretend XMM registers are made of uin32_t pieces, because they are manipulated 87 // in uint32_t chunks. 88 enum { 89 XMM0_0 = 0, XMM0_1, 90 XMM1_0, XMM1_1, 91 XMM2_0, XMM2_1, 92 XMM3_0, XMM3_1, 93 XMM4_0, XMM4_1, 94 XMM5_0, XMM5_1, 95 XMM6_0, XMM6_1, 96 XMM7_0, XMM7_1, 97 kNumberOfFloatRegisters}; 98 99 // Pointers to register locations. Values are initialized to null or the special registers below. 100 uintptr_t* gprs_[kNumberOfCpuRegisters]; 101 uint32_t* fprs_[kNumberOfFloatRegisters]; 102 // Hold values for esp, eip and arg0 if they are not located within a stack frame. EIP is somewhat 103 // special in that it cannot be encoded normally as a register operand to an instruction (except 104 // in 64bit addressing modes). 105 uintptr_t esp_, eip_, arg0_; 106 }; 107 } // namespace x86 108 } // namespace art 109 110 #endif // ART_RUNTIME_ARCH_X86_CONTEXT_X86_H_ 111
