1 /* 2 * Compare two 64-bit values 3 * x = y return 0 4 * x < y return -1 5 * x > y return 1 6 * 7 * I think I can improve on the ARM code by the following observation 8 * slt t0, x.hi, y.hi; # (x.hi < y.hi) ? 1:0 9 * sgt t1, x.hi, y.hi; # (y.hi > x.hi) ? 1:0 10 * subu v0, t0, t1 # v0= -1:1:0 for [ < > = ] 11 */ 12 /* cmp-long vAA, vBB, vCC */ 13 FETCH(a0, 1) # a0 <- CCBB 14 GET_OPA(rOBJ) # rOBJ <- AA 15 and a2, a0, 255 # a2 <- BB 16 srl a3, a0, 8 # a3 <- CC 17 EAS2(a2, rFP, a2) # a2 <- &fp[BB] 18 EAS2(a3, rFP, a3) # a3 <- &fp[CC] 19 LOAD64(a0, a1, a2) # a0/a1 <- vBB/vBB+1 20 LOAD64(a2, a3, a3) # a2/a3 <- vCC/vCC+1 21 22 FETCH_ADVANCE_INST(2) # advance rPC, load rINST 23 slt t0, a1, a3 # compare hi 24 sgt t1, a1, a3 25 subu v0, t1, t0 # v0 <- (-1, 1, 0) 26 bnez v0, .L${opcode}_finish 27 # at this point x.hi==y.hi 28 sltu t0, a0, a2 # compare lo 29 sgtu t1, a0, a2 30 subu v0, t1, t0 # v0 <- (-1, 1, 0) for [< > =] 31 32 .L${opcode}_finish: 33 GET_INST_OPCODE(t0) # extract opcode from rINST 34 SET_VREG_GOTO(v0, rOBJ, t0) # vAA <- v0 35
