1 /* const-wide/16 vAA, #+BBBB */ 2 srl a2, rINST, 8 # a2 <- AA 3 lh a0, 2(rPC) # a0 <- sign-extended BBBB 4 FETCH_ADVANCE_INST 2 # advance rPC, load rINST 5 GET_INST_OPCODE v0 # extract opcode from rINST 6 SET_VREG_WIDE a0, a2 # vAA <- +BBBB 7 GOTO_OPCODE v0 # jump to next instruction 8
