1 /* move-wide vA, vB */ 2 /* NOTE: regs can overlap, e.g. "move v6,v7" or "move v7,v6" */ 3 ext a3, rINST, 12, 4 # a3 <- B 4 ext a2, rINST, 8, 4 # a2 <- A 5 GET_VREG_WIDE a0, a3 # a0 <- vB 6 FETCH_ADVANCE_INST 1 # advance rPC, load rINST 7 GET_INST_OPCODE v0 # extract opcode from rINST 8 SET_VREG_WIDE a0, a2 # vA <- vB 9 GOTO_OPCODE v0 # jump to next instruction 10
