1 /**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19 #ifndef __MSM_DRM_H__ 20 #define __MSM_DRM_H__ 21 #include "drm.h" 22 #ifdef __cplusplus 23 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 24 #endif 25 #define MSM_PIPE_NONE 0x00 26 #define MSM_PIPE_2D0 0x01 27 #define MSM_PIPE_2D1 0x02 28 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 29 #define MSM_PIPE_3D0 0x10 30 #define MSM_PIPE_ID_MASK 0xffff 31 #define MSM_PIPE_ID(x) ((x) & MSM_PIPE_ID_MASK) 32 #define MSM_PIPE_FLAGS(x) ((x) & ~MSM_PIPE_ID_MASK) 33 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 34 struct drm_msm_timespec { 35 __s64 tv_sec; 36 __s64 tv_nsec; 37 }; 38 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 39 #define MSM_PARAM_GPU_ID 0x01 40 #define MSM_PARAM_GMEM_SIZE 0x02 41 #define MSM_PARAM_CHIP_ID 0x03 42 #define MSM_PARAM_MAX_FREQ 0x04 43 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 44 #define MSM_PARAM_TIMESTAMP 0x05 45 struct drm_msm_param { 46 __u32 pipe; 47 __u32 param; 48 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 49 __u64 value; 50 }; 51 #define MSM_BO_SCANOUT 0x00000001 52 #define MSM_BO_GPU_READONLY 0x00000002 53 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 54 #define MSM_BO_CACHE_MASK 0x000f0000 55 #define MSM_BO_CACHED 0x00010000 56 #define MSM_BO_WC 0x00020000 57 #define MSM_BO_UNCACHED 0x00040000 58 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 59 #define MSM_BO_FLAGS (MSM_BO_SCANOUT | MSM_BO_GPU_READONLY | MSM_BO_CACHED | MSM_BO_WC | MSM_BO_UNCACHED) 60 struct drm_msm_gem_new { 61 __u64 size; 62 __u32 flags; 63 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 64 __u32 handle; 65 }; 66 struct drm_msm_gem_info { 67 __u32 handle; 68 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 69 __u32 pad; 70 __u64 offset; 71 }; 72 #define MSM_PREP_READ 0x01 73 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 74 #define MSM_PREP_WRITE 0x02 75 #define MSM_PREP_NOSYNC 0x04 76 #define MSM_PREP_FLAGS (MSM_PREP_READ | MSM_PREP_WRITE | MSM_PREP_NOSYNC) 77 struct drm_msm_gem_cpu_prep { 78 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 79 __u32 handle; 80 __u32 op; 81 struct drm_msm_timespec timeout; 82 }; 83 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 84 struct drm_msm_gem_cpu_fini { 85 __u32 handle; 86 }; 87 struct drm_msm_gem_submit_reloc { 88 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 89 __u32 submit_offset; 90 __u32 or; 91 __s32 shift; 92 __u32 reloc_idx; 93 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 94 __u64 reloc_offset; 95 }; 96 #define MSM_SUBMIT_CMD_BUF 0x0001 97 #define MSM_SUBMIT_CMD_IB_TARGET_BUF 0x0002 98 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 99 #define MSM_SUBMIT_CMD_CTX_RESTORE_BUF 0x0003 100 struct drm_msm_gem_submit_cmd { 101 __u32 type; 102 __u32 submit_idx; 103 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 104 __u32 submit_offset; 105 __u32 size; 106 __u32 pad; 107 __u32 nr_relocs; 108 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 109 __u64 __user relocs; 110 }; 111 #define MSM_SUBMIT_BO_READ 0x0001 112 #define MSM_SUBMIT_BO_WRITE 0x0002 113 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 114 #define MSM_SUBMIT_BO_FLAGS (MSM_SUBMIT_BO_READ | MSM_SUBMIT_BO_WRITE) 115 struct drm_msm_gem_submit_bo { 116 __u32 flags; 117 __u32 handle; 118 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 119 __u64 presumed; 120 }; 121 #define MSM_SUBMIT_NO_IMPLICIT 0x80000000 122 #define MSM_SUBMIT_FENCE_FD_IN 0x40000000 123 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 124 #define MSM_SUBMIT_FENCE_FD_OUT 0x20000000 125 #define MSM_SUBMIT_FLAGS (MSM_SUBMIT_NO_IMPLICIT | MSM_SUBMIT_FENCE_FD_IN | MSM_SUBMIT_FENCE_FD_OUT | 0) 126 struct drm_msm_gem_submit { 127 __u32 flags; 128 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 129 __u32 fence; 130 __u32 nr_bos; 131 __u32 nr_cmds; 132 __u64 __user bos; 133 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 134 __u64 __user cmds; 135 __s32 fence_fd; 136 }; 137 struct drm_msm_wait_fence { 138 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 139 __u32 fence; 140 __u32 pad; 141 struct drm_msm_timespec timeout; 142 }; 143 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 144 #define MSM_MADV_WILLNEED 0 145 #define MSM_MADV_DONTNEED 1 146 #define __MSM_MADV_PURGED 2 147 struct drm_msm_gem_madvise { 148 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 149 __u32 handle; 150 __u32 madv; 151 __u32 retained; 152 }; 153 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 154 #define DRM_MSM_GET_PARAM 0x00 155 #define DRM_MSM_GEM_NEW 0x02 156 #define DRM_MSM_GEM_INFO 0x03 157 #define DRM_MSM_GEM_CPU_PREP 0x04 158 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 159 #define DRM_MSM_GEM_CPU_FINI 0x05 160 #define DRM_MSM_GEM_SUBMIT 0x06 161 #define DRM_MSM_WAIT_FENCE 0x07 162 #define DRM_MSM_GEM_MADVISE 0x08 163 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 164 #define DRM_MSM_NUM_IOCTLS 0x09 165 #define DRM_IOCTL_MSM_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GET_PARAM, struct drm_msm_param) 166 #define DRM_IOCTL_MSM_GEM_NEW DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_NEW, struct drm_msm_gem_new) 167 #define DRM_IOCTL_MSM_GEM_INFO DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_INFO, struct drm_msm_gem_info) 168 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 169 #define DRM_IOCTL_MSM_GEM_CPU_PREP DRM_IOW(DRM_COMMAND_BASE + DRM_MSM_GEM_CPU_PREP, struct drm_msm_gem_cpu_prep) 170 #define DRM_IOCTL_MSM_GEM_CPU_FINI DRM_IOW(DRM_COMMAND_BASE + DRM_MSM_GEM_CPU_FINI, struct drm_msm_gem_cpu_fini) 171 #define DRM_IOCTL_MSM_GEM_SUBMIT DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_SUBMIT, struct drm_msm_gem_submit) 172 #define DRM_IOCTL_MSM_WAIT_FENCE DRM_IOW(DRM_COMMAND_BASE + DRM_MSM_WAIT_FENCE, struct drm_msm_wait_fence) 173 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 174 #define DRM_IOCTL_MSM_GEM_MADVISE DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_MADVISE, struct drm_msm_gem_madvise) 175 #ifdef __cplusplus 176 #endif 177 #endif 178 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 179
