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      1 /*
      2  * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
      3  *
      4  * Redistribution and use in source and binary forms, with or without
      5  * modification, are permitted provided that the following conditions are met:
      6  *
      7  * Redistributions of source code must retain the above copyright notice, this
      8  * list of conditions and the following disclaimer.
      9  *
     10  * Redistributions in binary form must reproduce the above copyright notice,
     11  * this list of conditions and the following disclaimer in the documentation
     12  * and/or other materials provided with the distribution.
     13  *
     14  * Neither the name of ARM nor the names of its contributors may be used
     15  * to endorse or promote products derived from this software without specific
     16  * prior written permission.
     17  *
     18  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
     19  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     21  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
     22  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     23  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     24  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     25  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     26  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     27  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     28  * POSSIBILITY OF SUCH DAMAGE.
     29  */
     30 
     31 #include <arch.h>
     32 #include <assert.h>
     33 #include <cci400.h>
     34 #include <mmio.h>
     35 
     36 #define MAX_CLUSTERS		2
     37 
     38 static unsigned long cci_base_addr;
     39 static unsigned int cci_cluster_ix_to_iface[MAX_CLUSTERS];
     40 
     41 
     42 void cci_init(unsigned long cci_base,
     43 		int slave_iface3_cluster_ix,
     44 		int slave_iface4_cluster_ix)
     45 {
     46 	/*
     47 	 * Check the passed arguments are valid. The cluster indices must be
     48 	 * less than MAX_CLUSTERS, not the same as each other and at least one
     49 	 * of them must be refer to a valid cluster index.
     50 	 */
     51 	assert(cci_base);
     52 	assert(slave_iface3_cluster_ix < MAX_CLUSTERS);
     53 	assert(slave_iface4_cluster_ix < MAX_CLUSTERS);
     54 	assert(slave_iface3_cluster_ix != slave_iface4_cluster_ix);
     55 	assert((slave_iface3_cluster_ix >= 0) ||
     56 		(slave_iface3_cluster_ix >= 0));
     57 
     58 	cci_base_addr = cci_base;
     59 	if (slave_iface3_cluster_ix >= 0)
     60 		cci_cluster_ix_to_iface[slave_iface3_cluster_ix] =
     61 			SLAVE_IFACE3_OFFSET;
     62 	if (slave_iface4_cluster_ix >= 0)
     63 		cci_cluster_ix_to_iface[slave_iface4_cluster_ix] =
     64 			SLAVE_IFACE4_OFFSET;
     65 }
     66 
     67 static inline unsigned long get_slave_iface_base(unsigned long mpidr)
     68 {
     69 	/*
     70 	 * We assume the TF topology code allocates affinity instances
     71 	 * consecutively from zero.
     72 	 * It is a programming error if this is called without initializing
     73 	 * the slave interface to use for this cluster.
     74 	 */
     75 	unsigned int cluster_id =
     76 		(mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK;
     77 
     78 	assert(cluster_id < MAX_CLUSTERS);
     79 	assert(cci_cluster_ix_to_iface[cluster_id] != 0);
     80 
     81 	return cci_base_addr + cci_cluster_ix_to_iface[cluster_id];
     82 }
     83 
     84 void cci_enable_cluster_coherency(unsigned long mpidr)
     85 {
     86 	assert(cci_base_addr);
     87 	/* Enable Snoops and DVM messages */
     88 	mmio_write_32(get_slave_iface_base(mpidr) + SNOOP_CTRL_REG,
     89 		      DVM_EN_BIT | SNOOP_EN_BIT);
     90 
     91 	/* Wait for the dust to settle down */
     92 	while (mmio_read_32(cci_base_addr + STATUS_REG) & CHANGE_PENDING_BIT)
     93 		;
     94 }
     95 
     96 void cci_disable_cluster_coherency(unsigned long mpidr)
     97 {
     98 	assert(cci_base_addr);
     99 	/* Disable Snoops and DVM messages */
    100 	mmio_write_32(get_slave_iface_base(mpidr) + SNOOP_CTRL_REG,
    101 		      ~(DVM_EN_BIT | SNOOP_EN_BIT));
    102 
    103 	/* Wait for the dust to settle down */
    104 	while (mmio_read_32(cci_base_addr + STATUS_REG) & CHANGE_PENDING_BIT)
    105 		;
    106 }
    107 
    108