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      1 #
      2 # Copyright (c) 2014, ARM Limited and Contributors. All rights reserved.
      3 #
      4 # Redistribution and use in source and binary forms, with or without
      5 # modification, are permitted provided that the following conditions are met:
      6 #
      7 # Redistributions of source code must retain the above copyright notice, this
      8 # list of conditions and the following disclaimer.
      9 #
     10 # Redistributions in binary form must reproduce the above copyright notice,
     11 # this list of conditions and the following disclaimer in the documentation
     12 # and/or other materials provided with the distribution.
     13 #
     14 # Neither the name of ARM nor the names of its contributors may be used
     15 # to endorse or promote products derived from this software without specific
     16 # prior written permission.
     17 #
     18 # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
     19 # AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     20 # IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     21 # ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
     22 # LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     23 # CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     24 # SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     25 # INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     26 # CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     27 # ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     28 # POSSIBILITY OF SUCH DAMAGE.
     29 #
     30 
     31 # Cortex A57 specific optimisation to skip L1 cache flush when
     32 # cluster is powered down.
     33 SKIP_A57_L1_FLUSH_PWR_DWN	?=0
     34 
     35 # Process SKIP_A57_L1_FLUSH_PWR_DWN flag
     36 $(eval $(call assert_boolean,SKIP_A57_L1_FLUSH_PWR_DWN))
     37 $(eval $(call add_define,SKIP_A57_L1_FLUSH_PWR_DWN))
     38 
     39 
     40 # CPU Errata Build flags. These should be enabled by the
     41 # platform if the errata needs to be applied.
     42 
     43 # Flag to apply errata 806969 during reset. This errata applies only to
     44 # revision r0p0 of the Cortex A57 cpu.
     45 ERRATA_A57_806969	?=0
     46 
     47 # Flag to apply errata 813420 during reset. This errata applies only to
     48 # revision r0p0 of the Cortex A57 cpu.
     49 ERRATA_A57_813420	?=0
     50 
     51 # Process ERRATA_A57_806969 flag
     52 $(eval $(call assert_boolean,ERRATA_A57_806969))
     53 $(eval $(call add_define,ERRATA_A57_806969))
     54 
     55 # Process ERRATA_A57_813420 flag
     56 $(eval $(call assert_boolean,ERRATA_A57_813420))
     57 $(eval $(call add_define,ERRATA_A57_813420))
     58