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      1 #/** @file
      2 #
      3 #  Copyright (c) 2014, Linaro Limited. All rights reserved.
      4 #
      5 #  This program and the accompanying materials
      6 #  are licensed and made available under the terms and conditions of the BSD License
      7 #  which accompanies this distribution.  The full text of the license may be found at
      8 #  http://opensource.org/licenses/bsd-license.php
      9 #
     10 #  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
     11 #  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
     12 #
     13 #**/
     14 
     15 [Defines]
     16   DEC_SPECIFICATION              = 0x00010005
     17   PACKAGE_NAME                   = ArmVirtPkg
     18   PACKAGE_GUID                   = A0B31216-508E-4025-BEAB-56D836C66F0A
     19   PACKAGE_VERSION                = 0.1
     20 
     21 ################################################################################
     22 #
     23 # Include Section - list of Include Paths that are provided by this package.
     24 #                   Comments are used for Keywords and Module Types.
     25 #
     26 # Supported Module Types:
     27 #  BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION
     28 #
     29 ################################################################################
     30 [Includes.common]
     31   Include                        # Root include for the package
     32 
     33 [Guids.common]
     34   gArmVirtTokenSpaceGuid = { 0x0B6F5CA7, 0x4F53, 0x445A, { 0xB7, 0x6E, 0x2E, 0x36, 0x5B, 0x80, 0x63, 0x66 } }
     35   gEarlyPL011BaseAddressGuid       = { 0xB199DEA9, 0xFD5C, 0x4A84, { 0x80, 0x82, 0x2F, 0x41, 0x70, 0x78, 0x03, 0x05 } }
     36 
     37 [PcdsFixedAtBuild, PcdsPatchableInModule]
     38   #
     39   # This is the physical address where the device tree is expected to be stored
     40   # upon first entry into UEFI. This needs to be a FixedAtBuild PCD, so that we
     41   # can do a first pass over the device tree in the SEC phase to discover the
     42   # UART base address.
     43   #
     44   gArmVirtTokenSpaceGuid.PcdDeviceTreeInitialBaseAddress|0x0|UINT64|0x00000001
     45 
     46   #
     47   # Padding in bytes to add to the device tree allocation, so that the DTB can
     48   # be modified in place (default: 256 bytes)
     49   #
     50   gArmVirtTokenSpaceGuid.PcdDeviceTreeAllocationPadding|256|UINT32|0x00000002
     51 
     52   #
     53   # Binary representation of the GUID that determines the terminal type. The
     54   # size must be exactly 16 bytes. The default value corresponds to
     55   # EFI_VT_100_GUID.
     56   #
     57   gArmVirtTokenSpaceGuid.PcdTerminalTypeGuidBuffer|{0x65, 0x60, 0xA6, 0xDF, 0x19, 0xB4, 0xD3, 0x11, 0x9A, 0x2D, 0x00, 0x90, 0x27, 0x3F, 0xC1, 0x4D}|VOID*|0x00000007
     58 
     59 [PcdsDynamic, PcdsFixedAtBuild]
     60   #
     61   # ARM PSCI function invocations can be done either through hypervisor
     62   # calls (HVC) or secure monitor calls (SMC).
     63   # PcdArmPsciMethod == 1 : use HVC
     64   # PcdArmPsciMethod == 2 : use SMC
     65   #
     66   gArmVirtTokenSpaceGuid.PcdArmPsciMethod|0|UINT32|0x00000003
     67 
     68   gArmVirtTokenSpaceGuid.PcdFwCfgSelectorAddress|0x0|UINT64|0x00000004
     69   gArmVirtTokenSpaceGuid.PcdFwCfgDataAddress|0x0|UINT64|0x00000005
     70   gArmVirtTokenSpaceGuid.PcdFwCfgDmaAddress|0x0|UINT64|0x00000009
     71 
     72   #
     73   # Supported GIC revision (2, 3, ...)
     74   #
     75   gArmVirtTokenSpaceGuid.PcdArmGicRevision|0x0|UINT32|0x00000008
     76 
     77 [PcdsFeatureFlag]
     78   #
     79   # "Map PCI MMIO as Cached"
     80   #
     81   # Due to the way Stage1 and Stage2 mappings are combined on Aarch64, and
     82   # because KVM -- for the time being -- does not try to interfere with the
     83   # Stage1 mappings, we must not set EFI_MEMORY_UC for emulated PCI MMIO
     84   # regions.
     85   #
     86   # EFI_MEMORY_UC is mapped to Device-nGnRnE, and that Stage1 attribute would
     87   # direct guest writes to host DRAM immediately, bypassing the cache
     88   # regardless of Stage2 attributes. However, QEMU's reads of the same range
     89   # can easily be served from the (stale) CPU cache.
     90   #
     91   # Setting this PCD to TRUE will use EFI_MEMORY_WB for mapping PCI MMIO
     92   # regions, which ensures that guest writes to such regions go through the CPU
     93   # cache. Strictly speaking this is wrong, but it is needed as a temporary
     94   # workaround for emulated PCI devices. Setting the PCD to FALSE results in
     95   # the theoretically correct EFI_MEMORY_UC mapping, and should be the long
     96   # term choice, especially with assigned devices.
     97   #
     98   # The default is to turn off the kludge; DSC's can selectively enable it.
     99   #
    100   gArmVirtTokenSpaceGuid.PcdKludgeMapPciMmioAsCached|FALSE|BOOLEAN|0x00000006
    101