1 /*++ 2 3 Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR> 4 This program and the accompanying materials 5 are licensed and made available under the terms and conditions of the BSD License 6 which accompanies this distribution. The full text of the license may be found at 7 http://opensource.org/licenses/bsd-license.php 8 9 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 10 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 11 12 Module Name: 13 14 CpuFuncs.h 15 16 Abstract: 17 18 --*/ 19 20 #ifndef _CPU_FUNCS_H_ 21 #define _CPU_FUNCS_H_ 22 23 #define EFI_CPUID_SIGNATURE 0x0 24 #define EFI_CPUID_VERSION_INFO 0x1 25 #define EFI_CPUID_CACHE_INFO 0x2 26 #define EFI_CPUID_SERIAL_NUMBER 0x3 27 #define EFI_CPUID_EXTENDED_FUNCTION 0x80000000 28 #define EFI_CPUID_EXTENDED_CPU_SIG 0x80000001 29 #define EFI_CPUID_BRAND_STRING1 0x80000002 30 #define EFI_CPUID_BRAND_STRING2 0x80000003 31 #define EFI_CPUID_BRAND_STRING3 0x80000004 32 33 // 34 // CPUID version information masks 35 // Note: leaving masks here is for the compatibility 36 // use EfiCpuVersion (...) instead 37 // 38 #define EFI_CPUID_FAMILY 0x0F00 39 #define EFI_CPUID_MODEL 0x00F0 40 #define EFI_CPUID_STEPPING 0x000F 41 42 #define EFI_CPUID_PENTIUM_M 0x0600 43 #define EFI_CPUID_BANIAS 0x0090 44 #define EFI_CPUID_DOTHAN 0x00D0 45 #define EFI_CPUID_NETBURST 0x0F00 46 47 #define EFI_MSR_IA32_PLATFORM_ID 0x17 48 #define EFI_MSR_IA32_APIC_BASE 0x1B 49 #define EFI_MSR_EBC_HARD_POWERON 0x2A 50 #define EFI_MSR_EBC_SOFT_POWERON 0x2B 51 #define BINIT_DRIVER_DISABLE 0x40 52 #define INTERNAL_MCERR_DISABLE 0x20 53 #define INITIATOR_MCERR_DISABLE 0x10 54 #define EFI_MSR_EBC_FREQUENCY_ID 0x2C 55 #define EFI_MSR_IA32_BIOS_UPDT_TRIG 0x79 56 #define EFI_MSR_IA32_BIOS_SIGN_ID 0x8B 57 #define EFI_MSR_PSB_CLOCK_STATUS 0xCD 58 #define EFI_APIC_GLOBAL_ENABLE 0x800 59 #define EFI_MSR_IA32_MISC_ENABLE 0x1A0 60 #define LIMIT_CPUID_MAXVAL_ENABLE_BIT 0x00400000 61 #define AUTOMATIC_THERMAL_CONTROL_ENABLE_BIT 0x00000008 62 #define COMPATIBLE_FPU_OPCODE_ENABLE_BIT 0x00000004 63 #define LOGICAL_PROCESSOR_PRIORITY_ENABLE_BIT 0x00000002 64 #define FAST_STRING_ENABLE_BIT 0x00000001 65 66 #define EFI_CACHE_VARIABLE_MTRR_BASE 0x200 67 #define EFI_CACHE_VARIABLE_MTRR_END 0x20F 68 #define EFI_CACHE_IA32_MTRR_DEF_TYPE 0x2FF 69 #define EFI_CACHE_VALID_ADDRESS 0xFFFFFF000 70 #define EFI_CACHE_MTRR_VALID 0x800 71 #define EFI_CACHE_FIXED_MTRR_VALID 0x400 72 #define EFI_MSR_VALID_MASK 0xFFFFFFFFF 73 74 #define EFI_IA32_MTRR_FIX64K_00000 0x250 75 #define EFI_IA32_MTRR_FIX16K_80000 0x258 76 #define EFI_IA32_MTRR_FIX16K_A0000 0x259 77 #define EFI_IA32_MTRR_FIX4K_C0000 0x268 78 #define EFI_IA32_MTRR_FIX4K_C8000 0x269 79 #define EFI_IA32_MTRR_FIX4K_D0000 0x26A 80 #define EFI_IA32_MTRR_FIX4K_D8000 0x26B 81 #define EFI_IA32_MTRR_FIX4K_E0000 0x26C 82 #define EFI_IA32_MTRR_FIX4K_E8000 0x26D 83 #define EFI_IA32_MTRR_FIX4K_F0000 0x26E 84 #define EFI_IA32_MTRR_FIX4K_F8000 0x26F 85 86 #define EFI_IA32_MCG_CAP 0x179 87 #define EFI_IA32_MCG_CTL 0x17B 88 #define EFI_IA32_MC0_CTL 0x400 89 #define EFI_IA32_MC0_STATUS 0x401 90 91 #define EFI_CACHE_UNCACHEABLE 0 92 #define EFI_CACHE_WRITECOMBINING 1 93 #define EFI_CACHE_WRITETHROUGH 4 94 #define EFI_CACHE_WRITEPROTECTED 5 95 #define EFI_CACHE_WRITEBACK 6 96 97 // 98 // Combine f(FamilyId), m(Model), s(SteppingId) to a single 32 bit number 99 // 100 #define EfiMakeCpuVersion(f, m, s) \ 101 (((UINT32) (f) << 16) | ((UINT32) (m) << 8) | ((UINT32) (s))) 102 103 typedef struct { 104 UINT32 HeaderVersion; 105 UINT32 UpdateRevision; 106 UINT32 Date; 107 UINT32 ProcessorId; 108 UINT32 Checksum; 109 UINT32 LoaderRevision; 110 UINT32 ProcessorFlags; 111 UINT32 DataSize; 112 UINT32 TotalSize; 113 UINT8 Reserved[12]; 114 } EFI_CPU_MICROCODE_HEADER; 115 116 typedef struct { 117 UINT32 ExtSigCount; 118 UINT32 ExtChecksum; 119 UINT8 Reserved[12]; 120 UINT32 ProcessorId; 121 UINT32 ProcessorFlags; 122 UINT32 Checksum; 123 } EFI_CPU_MICROCODE_EXT_HEADER; 124 125 typedef struct { 126 UINT32 RegEax; 127 UINT32 RegEbx; 128 UINT32 RegEcx; 129 UINT32 RegEdx; 130 } EFI_CPUID_REGISTER; 131 132 VOID 133 EfiWriteMsr ( 134 IN UINT32 Input, 135 IN UINT64 Value 136 ) 137 /*++ 138 139 Routine Description: 140 141 Write Cpu MSR 142 143 Arguments: 144 145 Input -The index value to select the register 146 Value -The value to write to the selected register 147 148 Returns: 149 150 None 151 152 --*/ 153 ; 154 155 UINT64 156 EfiReadMsr ( 157 IN UINT32 Input 158 ) 159 /*++ 160 161 Routine Description: 162 163 Read Cpu MSR. 164 165 Arguments: 166 167 Input: -The index value to select the register 168 169 Returns: 170 171 Return the read data 172 173 --*/ 174 ; 175 176 VOID 177 EfiCpuid ( 178 IN UINT32 RegEax, 179 OUT EFI_CPUID_REGISTER *Reg 180 ) 181 /*++ 182 183 Routine Description: 184 185 Get the Cpu info by excute the CPUID instruction. 186 187 Arguments: 188 189 RegEax -The input value to put into register EAX 190 Reg -The Output value 191 192 Returns: 193 194 None 195 196 --*/ 197 ; 198 199 VOID 200 EfiCpuVersion ( 201 IN UINT16 *FamilyId, OPTIONAL 202 IN UINT8 *Model, OPTIONAL 203 IN UINT8 *SteppingId, OPTIONAL 204 IN UINT8 *Processor OPTIONAL 205 ) 206 /*++ 207 208 Routine Description: 209 Extract CPU detail version infomation 210 211 Arguments: 212 FamilyId - FamilyId, including ExtendedFamilyId 213 Model - Model, including ExtendedModel 214 SteppingId - SteppingId 215 Processor - Processor 216 217 --*/ 218 ; 219 220 UINT64 221 EfiReadTsc ( 222 VOID 223 ) 224 /*++ 225 226 Routine Description: 227 228 Read Time stamp. 229 230 Arguments: 231 232 None 233 234 Returns: 235 236 Return the read data 237 238 --*/ 239 ; 240 VOID 241 EfiCpuidExt ( 242 IN UINT32 RegisterInEax, 243 IN UINT32 CacheLevel, 244 OUT EFI_CPUID_REGISTER *Regs 245 ) 246 /*++ 247 Routine Description: 248 When RegisterInEax != 4, the functionality is the same as EfiCpuid. 249 When RegisterInEax == 4, the function return the deterministic cache 250 parameters by excuting the CPUID instruction 251 Arguments: 252 RegisterInEax: - The input value to put into register EAX 253 CacheLevel: - The deterministic cache level 254 Regs: - The Output value 255 Returns: 256 None 257 --*/ 258 ; 259 260 #endif 261
