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      1 ## @file

      2 # Provides drivers and definitions to support fsp in EDKII bios.

      3 #

      4 # Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>

      5 # This program and the accompanying materials are licensed and made available under

      6 # the terms and conditions of the BSD License that accompanies this distribution.

      7 # The full text of the license may be found at

      8 # http://opensource.org/licenses/bsd-license.php.

      9 #

     10 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

     11 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

     12 #

     13 ##

     14 
     15 [Defines]
     16   DEC_SPECIFICATION              = 0x00010005
     17   PACKAGE_NAME                   = IntelFspWrapperPkg
     18   PACKAGE_GUID                   = 99101BB6-6DE1-4537-85A3-FD6B594F7468
     19   PACKAGE_VERSION                = 0.1
     20 
     21 [Includes]
     22   Include
     23 
     24 [LibraryClasses]
     25   ##  @libraryclass  Provide FSP API related function.

     26   FspApiLib|Include/Library/FspApiLib.h
     27 
     28   ##  @libraryclass  Provide FSP hob process related function.

     29   FspHobProcessLib|Include/Library/FspHobProcessLib.h
     30 
     31   ##  @libraryclass  Provide FSP platform information related function.

     32   FspPlatformInfoLib|Include/Library/FspPlatformInfoLib.h
     33 
     34   ##  @libraryclass  Provide FSP wrapper platform sec related function.

     35   FspPlatformSecLib|Include/Library/FspPlatformSecLib.h
     36 
     37 [Guids]
     38   #

     39   # GUID defined in package

     40   #

     41   gFspWrapperTokenSpaceGuid             = {0x2bc1c74a, 0x122f, 0x40b2, { 0xb2, 0x23, 0x8, 0x2b, 0x74, 0x65, 0x22, 0x5d } }
     42 
     43 [Ppis]
     44   gFspInitDonePpiGuid       = { 0xf5ef05e4, 0xd538, 0x4774, { 0x8f, 0x1b, 0xe9, 0x77, 0x30, 0x11, 0xe0, 0x38 } }
     45   gTopOfTemporaryRamPpiGuid = { 0x2f3962b2, 0x57c5, 0x44ec, { 0x9e, 0xfc, 0xa6, 0x9f, 0xd3, 0x02, 0x03, 0x2b } }
     46 
     47 [Protocols]
     48 
     49 ################################################################################

     50 #

     51 # PCD Declarations section - list of all PCDs Declared by this Package

     52 #                            Only this package should be providing the

     53 #                            declaration, other packages should not.

     54 #

     55 ################################################################################

     56 [PcdsFixedAtBuild, PcdsPatchableInModule]
     57   ## Provides the memory mapped base address of the BIOS CodeCache Flash Device.

     58   gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheAddress|0xFFE00000|UINT32|0x10000001
     59   ## Provides the size of the BIOS Flash Device.

     60   gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheSize|0x00200000|UINT32|0x10000002
     61 
     62   ## Indicates the base address of the factory FSP binary.

     63   gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase|0xFFF80000|UINT32|0x10000003
     64   ## Indicates the base address of the updatable FSP binary to support Dual FSP.

     65   #  There could be two FSP images at different locations in a flash - 

     66   #  one factory version (default) and updatable version (updatable).

     67   #  TempRamInit, FspMemoryInit and TempRamExit are always executed from factory version.

     68   #  FspSiliconInit and NotifyPhase can be executed from updatable version if it is available,

     69   #  FspSiliconInit and NotifyPhase are executed from factory version if there is no updateable version,

     70   #  PcdFlashFvFspBase is base address of factory FSP, and PcdFlashFvSecondFspBase

     71   #  is base address of updatable FSP. If PcdFlashFvSecondFspBase is 0, that means

     72   #  there is no updatable FSP.

     73   gFspWrapperTokenSpaceGuid.PcdFlashFvSecondFspBase|0x00000000|UINT32|0x10000008
     74   ## Provides the size of the factory FSP binary.

     75   gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize|0x00048000|UINT32|0x10000004
     76   ## Provides the size of the updatable FSP binary to support Dual FSP.

     77   gFspWrapperTokenSpaceGuid.PcdFlashFvSecondFspSize|0x00000000|UINT32|0x10000009
     78 
     79   ## Indicates the base address of the first Microcode Patch in the Microcode Region

     80   gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress|0x0|UINT64|0x10000005
     81   gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize|0x0|UINT64|0x10000006
     82   ## Indicates the offset of the Cpu Microcode.

     83   gFspWrapperTokenSpaceGuid.PcdFlashMicroCodeOffset|0x90|UINT32|0x10000007
     84 
     85   ##

     86   #  Maximum number of Ppi is provided by SecCore.

     87   ##

     88   gFspWrapperTokenSpaceGuid.PcdSecCoreMaxPpiSupported|0x6|UINT32|0x20000001
     89 
     90   # This is MAX UPD region size

     91   gFspWrapperTokenSpaceGuid.PcdMaxUpdRegionSize|0x200|UINT32|0x30000001
     92 
     93   ## Stack size in the temporary RAM.

     94   #   0 means half of TemporaryRamSize.

     95   gFspWrapperTokenSpaceGuid.PcdPeiTemporaryRamStackSize|0|UINT32|0x40000001
     96 
     97   # This is temporary DRAM base and size for StackTop in FspInit

     98   gFspWrapperTokenSpaceGuid.PcdTemporaryRamBase|0x00080000|UINT32|0x40000002
     99   gFspWrapperTokenSpaceGuid.PcdTemporaryRamSize|0x00010000|UINT32|0x40000003
    100 
    101   ## Indicate the PEI memory size platform want to report

    102   gFspWrapperTokenSpaceGuid.PcdPeiMinMemSize|0x1800000|UINT32|0x40000004
    103   ## Indicate the PEI memory size platform want to report

    104   gFspWrapperTokenSpaceGuid.PcdPeiRecoveryMinMemSize|0x3000000|UINT32|0x40000005
    105 
    106   ## PcdFspApiVersion is to determine wrapper calling mechanism

    107   # - FSP_API_REVISION_1     1

    108   # - FSP_API_REVISION_2     2

    109   gFspWrapperTokenSpaceGuid.PcdFspApiVersion|0x02|UINT8|0x00001000
    110