1 /** @file 2 Misc Registers Definition. 3 4 Copyright (c) 2011 - 2015, Intel Corporation. All rights reserved.<BR> 5 6 This program and the accompanying materials are licensed and made available under 7 the terms and conditions of the BSD License that accompanies this distribution. 8 The full text of the license may be found at 9 http://opensource.org/licenses/bsd-license.php. 10 11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 13 14 --*/ 15 16 #ifndef _I2C_ACCESS_H_ 17 #define _I2C_ACCESS_H_ 18 19 #include "I2CIoLibPei.h" 20 21 #define DEFAULT_PCI_BUS_NUMBER_PCH 0 22 23 #define PCI_DEVICE_NUMBER_PCH_LPC 31 24 #define PCI_FUNCTION_NUMBER_PCH_LPC 0 25 26 #define R_PCH_LPC_ACPI_BASE 0x40 // ABASE, 16bit 27 #define R_PCH_LPC_ACPI_BASEADR 0x400 // ABASE, 16bit 28 #define B_PCH_LPC_ACPI_BASE_EN BIT1 // Enable Bit 29 #define B_PCH_LPC_ACPI_BASE_BAR 0x0000FF80 // Base Address, 128 Bytes 30 #define V_PCH_ACPI_PM1_TMR_MAX_VAL 0x1000000 // The timer is 24 bit overflow 31 #define B_PCH_ACPI_PM1_TMR_VAL 0xFFFFFF // The timer value mask 32 33 #define R_PCH_ACPI_PM1_TMR 0x08 // Power Management 1 Timer 34 #define V_PCH_ACPI_PM1_TMR_FREQUENCY 3579545 // Timer Frequency 35 36 37 #define PchLpcPciCfg8(Register) I2CLibPeiMmioRead8 (MmPciAddress (0, DEFAULT_PCI_BUS_NUMBER_PCH, PCI_DEVICE_NUMBER_PCH_LPC, 0, Register)) 38 39 #define PCIEX_BASE_ADDRESS 0xE0000000 40 #define PCI_EXPRESS_BASE_ADDRESS ((VOID *) (UINTN) PCIEX_BASE_ADDRESS) 41 42 #define MmPciAddress( Segment, Bus, Device, Function, Register ) \ 43 ( (UINTN)PCI_EXPRESS_BASE_ADDRESS + \ 44 (UINTN)(Bus << 20) + \ 45 (UINTN)(Device << 15) + \ 46 (UINTN)(Function << 12) + \ 47 (UINTN)(Register) \ 48 ) 49 #endif 50 51
