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      1 /*
      2 
      3 Copyright (c) 2009, 2010, 2011, 2013 STMicroelectronics
      4 Written by Christophe Lyon
      5 
      6 Permission is hereby granted, free of charge, to any person obtaining a copy
      7 of this software and associated documentation files (the "Software"), to deal
      8 in the Software without restriction, including without limitation the rights
      9 to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
     10 copies of the Software, and to permit persons to whom the Software is
     11 furnished to do so, subject to the following conditions:
     12 
     13 The above copyright notice and this permission notice shall be included in
     14 all copies or substantial portions of the Software.
     15 
     16 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     17 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     18 FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
     19 AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
     20 LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
     21 OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
     22 THE SOFTWARE.
     23 
     24 */
     25 
     26 #if defined(__arm__) || defined(__aarch64__)
     27 #include <arm_neon.h>
     28 #else
     29 #include "stm-arm-neon.h"
     30 #endif
     31 
     32 #include "stm-arm-neon-ref.h"
     33 
     34 void exec_vldX (void)
     35 {
     36   /* In this case, input variables are arrays of vectors */
     37 #define DECL_VLDX(T1, W, N, X)						\
     38   VECT_ARRAY_TYPE(T1, W, N, X) VECT_ARRAY_VAR(vector, T1, W, N, X);	\
     39   VECT_VAR_DECL(result_bis_##X, T1, W, N)[X * N]
     40 
     41   /* We need to use a temporary result buffer (result_bis), because
     42      the one used for other tests is not large enough. A subset of the
     43      result data is moved from result_bis to result, and it is this
     44      subset which is used to check the actual behaviour. The next
     45      macro enables to move another chunk of data from result_bis to
     46      result.  */
     47 #define TEST_VLDX(Q, T1, T2, W, N, X)					\
     48   VECT_ARRAY_VAR(vector, T1, W, N, X) =					\
     49     /* Use dedicated init buffer, of size X */				\
     50     vld##X##Q##_##T2##W(VECT_ARRAY_VAR(buffer_vld##X, T1, W, N, X));	\
     51   vst##X##Q##_##T2##W(VECT_VAR(result_bis_##X, T1, W, N),		\
     52 		      VECT_ARRAY_VAR(vector, T1, W, N, X));		\
     53   memcpy(VECT_VAR(result, T1, W, N), VECT_VAR(result_bis_##X, T1, W, N), \
     54 	 sizeof(VECT_VAR(result, T1, W, N)));
     55 
     56   /* Overwrite "result" with the contents of "result_bis"[Y] */
     57 #define TEST_EXTRA_CHUNK(T1, W, N, X,Y)			\
     58   memcpy(VECT_VAR(result, T1, W, N),			\
     59 	 &(VECT_VAR(result_bis_##X, T1, W, N)[Y*N]),	\
     60 	 sizeof(VECT_VAR(result, T1, W, N)));
     61 
     62   /* With ARM RVCT, we need to declare variables before any executable
     63      statement */
     64 
     65   /* We need all variants in 64 bits, but there is no 64x2 variant */
     66 #define DECL_ALL_VLDX(X)			\
     67   DECL_VLDX(int, 8, 8, X);			\
     68   DECL_VLDX(int, 16, 4, X);			\
     69   DECL_VLDX(int, 32, 2, X);			\
     70   DECL_VLDX(int, 64, 1, X);			\
     71   DECL_VLDX(uint, 8, 8, X);			\
     72   DECL_VLDX(uint, 16, 4, X);			\
     73   DECL_VLDX(uint, 32, 2, X);			\
     74   DECL_VLDX(uint, 64, 1, X);			\
     75   DECL_VLDX(poly, 8, 8, X);			\
     76   DECL_VLDX(poly, 16, 4, X);			\
     77   DECL_VLDX(float, 32, 2, X);			\
     78   DECL_VLDX(int, 8, 16, X);			\
     79   DECL_VLDX(int, 16, 8, X);			\
     80   DECL_VLDX(int, 32, 4, X);			\
     81   DECL_VLDX(uint, 8, 16, X);			\
     82   DECL_VLDX(uint, 16, 8, X);			\
     83   DECL_VLDX(uint, 32, 4, X);			\
     84   DECL_VLDX(poly, 8, 16, X);			\
     85   DECL_VLDX(poly, 16, 8, X);			\
     86   DECL_VLDX(float, 32, 4, X)
     87 
     88 #if defined(__ARM_FP16_FORMAT_IEEE) && ( ((__ARM_FP & 0x2) != 0) || ((__ARM_NEON_FP16_INTRINSICS & 1) != 0) )
     89 #define DECL_ALL_VLDX_FP16(X)			\
     90   DECL_VLDX(float, 16, 4, X);			\
     91   DECL_VLDX(float, 16, 8, X)
     92 #endif
     93 
     94 #define TEST_ALL_VLDX(X)			\
     95   TEST_VLDX(, int, s, 8, 8, X);			\
     96   TEST_VLDX(, int, s, 16, 4, X);		\
     97   TEST_VLDX(, int, s, 32, 2, X);		\
     98   TEST_VLDX(, int, s, 64, 1, X);		\
     99   TEST_VLDX(, uint, u, 8, 8, X);		\
    100   TEST_VLDX(, uint, u, 16, 4, X);		\
    101   TEST_VLDX(, uint, u, 32, 2, X);		\
    102   TEST_VLDX(, uint, u, 64, 1, X);		\
    103   TEST_VLDX(, poly, p, 8, 8, X);		\
    104   TEST_VLDX(, poly, p, 16, 4, X);		\
    105   TEST_VLDX(, float, f, 32, 2, X);		\
    106   TEST_VLDX(q, int, s, 8, 16, X);		\
    107   TEST_VLDX(q, int, s, 16, 8, X);		\
    108   TEST_VLDX(q, int, s, 32, 4, X);		\
    109   TEST_VLDX(q, uint, u, 8, 16, X);		\
    110   TEST_VLDX(q, uint, u, 16, 8, X);		\
    111   TEST_VLDX(q, uint, u, 32, 4, X);		\
    112   TEST_VLDX(q, poly, p, 8, 16, X);		\
    113   TEST_VLDX(q, poly, p, 16, 8, X);		\
    114   TEST_VLDX(q, float, f, 32, 4, X)
    115 
    116 #if defined(__ARM_FP16_FORMAT_IEEE) && ( ((__ARM_FP & 0x2) != 0) || ((__ARM_NEON_FP16_INTRINSICS & 1) != 0) )
    117 #define TEST_ALL_VLDX_FP16(X)			\
    118   TEST_VLDX(, float, f, 16, 4, X);		\
    119   TEST_VLDX(q, float, f, 16, 8, X)
    120 #endif
    121 
    122 #define TEST_ALL_EXTRA_CHUNKS(X, Y)		\
    123   TEST_EXTRA_CHUNK(int, 8, 8, X, Y);		\
    124   TEST_EXTRA_CHUNK(int, 16, 4, X, Y);		\
    125   TEST_EXTRA_CHUNK(int, 32, 2, X, Y);		\
    126   TEST_EXTRA_CHUNK(int, 64, 1, X, Y);		\
    127   TEST_EXTRA_CHUNK(uint, 8, 8, X, Y);		\
    128   TEST_EXTRA_CHUNK(uint, 16, 4, X, Y);		\
    129   TEST_EXTRA_CHUNK(uint, 32, 2, X, Y);		\
    130   TEST_EXTRA_CHUNK(uint, 64, 1, X, Y);		\
    131   TEST_EXTRA_CHUNK(poly, 8, 8, X, Y);		\
    132   TEST_EXTRA_CHUNK(poly, 16, 4, X, Y);		\
    133   TEST_EXTRA_CHUNK(float, 32, 2, X, Y);		\
    134   TEST_EXTRA_CHUNK(int, 8, 16, X, Y);		\
    135   TEST_EXTRA_CHUNK(int, 16, 8, X, Y);		\
    136   TEST_EXTRA_CHUNK(int, 32, 4, X, Y);		\
    137   TEST_EXTRA_CHUNK(uint, 8, 16, X, Y);		\
    138   TEST_EXTRA_CHUNK(uint, 16, 8, X, Y);		\
    139   TEST_EXTRA_CHUNK(uint, 32, 4, X, Y);		\
    140   TEST_EXTRA_CHUNK(poly, 8, 16, X, Y);		\
    141   TEST_EXTRA_CHUNK(poly, 16, 8, X, Y);		\
    142   TEST_EXTRA_CHUNK(float, 32, 4, X, Y)
    143 
    144 #if defined(__ARM_FP16_FORMAT_IEEE) && ( ((__ARM_FP & 0x2) != 0) || ((__ARM_NEON_FP16_INTRINSICS & 1) != 0) )
    145 #define TEST_ALL_EXTRA_CHUNKS_FP16(X, Y)	\
    146   TEST_EXTRA_CHUNK(float, 16, 4, X, Y);		\
    147   TEST_EXTRA_CHUNK(float, 16, 8, X, Y)
    148 #endif
    149 
    150   DECL_ALL_VLDX(2);
    151   DECL_ALL_VLDX(3);
    152   DECL_ALL_VLDX(4);
    153 
    154 #if defined(__ARM_FP16_FORMAT_IEEE) && ( ((__ARM_FP & 0x2) != 0) || ((__ARM_NEON_FP16_INTRINSICS & 1) != 0) )
    155   DECL_ALL_VLDX_FP16(2);
    156   DECL_ALL_VLDX_FP16(3);
    157   DECL_ALL_VLDX_FP16(4);
    158 #endif
    159 
    160   /* Check vld2/vld2q */
    161   clean_results ();
    162 #define TEST_MSG "VLD2/VLD2Q"
    163   TEST_ALL_VLDX(2);
    164 #if defined(__ARM_FP16_FORMAT_IEEE) && ( ((__ARM_FP & 0x2) != 0) || ((__ARM_NEON_FP16_INTRINSICS & 1) != 0) )
    165   TEST_ALL_VLDX_FP16(2);
    166 #endif
    167   dump_results_hex2 (TEST_MSG, " chunk 0");
    168 
    169   TEST_ALL_EXTRA_CHUNKS(2, 1);
    170 #if defined(__ARM_FP16_FORMAT_IEEE) && ( ((__ARM_FP & 0x2) != 0) || ((__ARM_NEON_FP16_INTRINSICS & 1) != 0) )
    171   TEST_ALL_EXTRA_CHUNKS_FP16(2, 1);
    172 #endif
    173   dump_results_hex2 (TEST_MSG, " chunk 1");
    174 
    175   /* Check vld3/vld3q */
    176   clean_results ();
    177 #undef TEST_MSG
    178 #define TEST_MSG "VLD3/VLD3Q"
    179   TEST_ALL_VLDX(3);
    180 #if defined(__ARM_FP16_FORMAT_IEEE) && ( ((__ARM_FP & 0x2) != 0) || ((__ARM_NEON_FP16_INTRINSICS & 1) != 0) )
    181   TEST_ALL_VLDX_FP16(3);
    182 #endif
    183   dump_results_hex2 (TEST_MSG, " chunk 0");
    184 
    185   TEST_ALL_EXTRA_CHUNKS(3, 1);
    186 #if defined(__ARM_FP16_FORMAT_IEEE) && ( ((__ARM_FP & 0x2) != 0) || ((__ARM_NEON_FP16_INTRINSICS & 1) != 0) )
    187   TEST_ALL_EXTRA_CHUNKS_FP16(3, 1);
    188 #endif
    189   dump_results_hex2 (TEST_MSG, " chunk 1");
    190   TEST_ALL_EXTRA_CHUNKS(3, 2);
    191 #if defined(__ARM_FP16_FORMAT_IEEE) && ( ((__ARM_FP & 0x2) != 0) || ((__ARM_NEON_FP16_INTRINSICS & 1) != 0) )
    192   TEST_ALL_EXTRA_CHUNKS_FP16(3, 2);
    193 #endif
    194   dump_results_hex2 (TEST_MSG, " chunk 2");
    195 
    196   /* Check vld4/vld4q */
    197   clean_results ();
    198 #undef TEST_MSG
    199 #define TEST_MSG "VLD4/VLD4Q"
    200   TEST_ALL_VLDX(4);
    201 #if defined(__ARM_FP16_FORMAT_IEEE) && ( ((__ARM_FP & 0x2) != 0) || ((__ARM_NEON_FP16_INTRINSICS & 1) != 0) )
    202   TEST_ALL_VLDX_FP16(4);
    203 #endif
    204   dump_results_hex2 (TEST_MSG, " chunk 0");
    205 
    206   TEST_ALL_EXTRA_CHUNKS(4, 1);
    207 #if defined(__ARM_FP16_FORMAT_IEEE) && ( ((__ARM_FP & 0x2) != 0) || ((__ARM_NEON_FP16_INTRINSICS & 1) != 0) )
    208   TEST_ALL_EXTRA_CHUNKS_FP16(4, 1);
    209 #endif
    210   dump_results_hex2 (TEST_MSG, " chunk 1");
    211   TEST_ALL_EXTRA_CHUNKS(4, 2);
    212 #if defined(__ARM_FP16_FORMAT_IEEE) && ( ((__ARM_FP & 0x2) != 0) || ((__ARM_NEON_FP16_INTRINSICS & 1) != 0) )
    213   TEST_ALL_EXTRA_CHUNKS_FP16(4, 2);
    214 #endif
    215   dump_results_hex2 (TEST_MSG, " chunk 2");
    216   TEST_ALL_EXTRA_CHUNKS(4, 3);
    217 #if defined(__ARM_FP16_FORMAT_IEEE) && ( ((__ARM_FP & 0x2) != 0) || ((__ARM_NEON_FP16_INTRINSICS & 1) != 0) )
    218   TEST_ALL_EXTRA_CHUNKS_FP16(4, 3);
    219 #endif
    220   dump_results_hex2 (TEST_MSG, " chunk 3");
    221 }
    222