1 /* 2 3 Copyright (c) 2009, 2010, 2011, 2013 STMicroelectronics 4 Written by Christophe Lyon 5 6 Permission is hereby granted, free of charge, to any person obtaining a copy 7 of this software and associated documentation files (the "Software"), to deal 8 in the Software without restriction, including without limitation the rights 9 to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 copies of the Software, and to permit persons to whom the Software is 11 furnished to do so, subject to the following conditions: 12 13 The above copyright notice and this permission notice shall be included in 14 all copies or substantial portions of the Software. 15 16 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 19 AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 THE SOFTWARE. 23 24 */ 25 26 /* Template file for unary operator validation */ 27 28 #if defined(__arm__) || defined(__aarch64__) 29 #include <arm_neon.h> 30 #else 31 #include "stm-arm-neon.h" 32 #endif 33 34 #include "stm-arm-neon-ref.h" 35 36 void exec_vrev (void) 37 { 38 /* Basic test: y=vrev(x), then store the result. */ 39 #define TEST_VREV(Q, T1, T2, W, N, W2) \ 40 VECT_VAR(vector_res, T1, W, N) = \ 41 vrev##W2##Q##_##T2##W(VECT_VAR(vector, T1, W, N)); \ 42 vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), VECT_VAR(vector_res, T1, W, N)) 43 44 /* With ARM RVCT, we need to declare variables before any executable 45 statement */ 46 47 DECL_VARIABLE_ALL_VARIANTS(vector); 48 DECL_VARIABLE_ALL_VARIANTS(vector_res); 49 50 clean_results (); 51 52 /* Initialize input "vector" from "buffer" */ 53 TEST_MACRO_ALL_VARIANTS_2_5(VLOAD, vector, buffer); 54 VLOAD(vector, buffer, , float, f, 32, 2); 55 VLOAD(vector, buffer, q, float, f, 32, 4); 56 57 /* Check vrev in each of the existing combinations */ 58 #define TEST_MSG "VREV16" 59 TEST_VREV(, int, s, 8, 8, 16); 60 TEST_VREV(, uint, u, 8, 8, 16); 61 TEST_VREV(, poly, p, 8, 8, 16); 62 TEST_VREV(q, int, s, 8, 16, 16); 63 TEST_VREV(q, uint, u, 8, 16, 16); 64 TEST_VREV(q, poly, p, 8, 16, 16); 65 dump_results_hex (TEST_MSG); 66 67 #undef TEST_MSG 68 #define TEST_MSG "VREV32" 69 TEST_VREV(, int, s, 8, 8, 32); 70 TEST_VREV(, int, s, 16, 4, 32); 71 TEST_VREV(, uint, u, 8, 8, 32); 72 TEST_VREV(, uint, u, 16, 4, 32); 73 TEST_VREV(, poly, p, 8, 8, 32); 74 TEST_VREV(, poly, p, 16, 4, 32); 75 TEST_VREV(q, int, s, 8, 16, 32); 76 TEST_VREV(q, int, s, 16, 8, 32); 77 TEST_VREV(q, uint, u, 8, 16, 32); 78 TEST_VREV(q, uint, u, 16, 8, 32); 79 TEST_VREV(q, poly, p, 8, 16, 32); 80 TEST_VREV(q, poly, p, 16, 8, 32); 81 dump_results_hex (TEST_MSG); 82 83 #undef TEST_MSG 84 #define TEST_MSG "VREV64" 85 TEST_VREV(, int, s, 8, 8, 64); 86 TEST_VREV(, int, s, 16, 4, 64); 87 TEST_VREV(, int, s, 32, 2, 64); 88 TEST_VREV(, uint, u, 8, 8, 64); 89 TEST_VREV(, uint, u, 16, 4, 64); 90 TEST_VREV(, uint, u, 32, 2, 64); 91 TEST_VREV(, poly, p, 8, 8, 64); 92 TEST_VREV(, poly, p, 16, 4, 64); 93 TEST_VREV(q, int, s, 8, 16, 64); 94 TEST_VREV(q, int, s, 16, 8, 64); 95 TEST_VREV(q, int, s, 32, 4, 64); 96 TEST_VREV(q, uint, u, 8, 16, 64); 97 TEST_VREV(q, uint, u, 16, 8, 64); 98 TEST_VREV(q, uint, u, 32, 4, 64); 99 TEST_VREV(q, poly, p, 8, 16, 64); 100 TEST_VREV(q, poly, p, 16, 8, 64); 101 102 TEST_VREV(, float, f, 32, 2, 64); 103 TEST_VREV(q, float, f, 32, 4, 64); 104 105 dump_results_hex (TEST_MSG); 106 } 107
