1 // RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu cortex-a57 -ffreestanding -emit-llvm %s -o - | opt -S -mem2reg | FileCheck %s 2 3 #include <arm_neon.h> 4 5 // CHECK-LABEL: define <2 x i32> @test_vcvta_s32_f32(<2 x float> %a) #0 { 6 // CHECK: [[TMP0:%.*]] = bitcast <2 x float> %a to <8 x i8> 7 // CHECK: [[VCVTA_S32_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x float> 8 // CHECK: [[VCVTA_S32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtas.v2i32.v2f32(<2 x float> [[VCVTA_S32_V_I]]) #2 9 // CHECK: ret <2 x i32> [[VCVTA_S32_V1_I]] 10 int32x2_t test_vcvta_s32_f32(float32x2_t a) { 11 return vcvta_s32_f32(a); 12 } 13 14 // CHECK-LABEL: define <2 x i32> @test_vcvta_u32_f32(<2 x float> %a) #0 { 15 // CHECK: [[TMP0:%.*]] = bitcast <2 x float> %a to <8 x i8> 16 // CHECK: [[VCVTA_U32_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x float> 17 // CHECK: [[VCVTA_U32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtau.v2i32.v2f32(<2 x float> [[VCVTA_U32_V_I]]) #2 18 // CHECK: ret <2 x i32> [[VCVTA_U32_V1_I]] 19 uint32x2_t test_vcvta_u32_f32(float32x2_t a) { 20 return vcvta_u32_f32(a); 21 } 22 23 // CHECK-LABEL: define <4 x i32> @test_vcvtaq_s32_f32(<4 x float> %a) #0 { 24 // CHECK: [[TMP0:%.*]] = bitcast <4 x float> %a to <16 x i8> 25 // CHECK: [[VCVTAQ_S32_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x float> 26 // CHECK: [[VCVTAQ_S32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtas.v4i32.v4f32(<4 x float> [[VCVTAQ_S32_V_I]]) #2 27 // CHECK: ret <4 x i32> [[VCVTAQ_S32_V1_I]] 28 int32x4_t test_vcvtaq_s32_f32(float32x4_t a) { 29 return vcvtaq_s32_f32(a); 30 } 31 32 // CHECK-LABEL: define <4 x i32> @test_vcvtaq_u32_f32(<4 x float> %a) #0 { 33 // CHECK: [[TMP0:%.*]] = bitcast <4 x float> %a to <16 x i8> 34 // CHECK: [[VCVTAQ_U32_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x float> 35 // CHECK: [[VCVTAQ_U32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtau.v4i32.v4f32(<4 x float> [[VCVTAQ_U32_V_I]]) #2 36 // CHECK: ret <4 x i32> [[VCVTAQ_U32_V1_I]] 37 uint32x4_t test_vcvtaq_u32_f32(float32x4_t a) { 38 return vcvtaq_u32_f32(a); 39 } 40 41 // CHECK-LABEL: define <2 x i32> @test_vcvtn_s32_f32(<2 x float> %a) #0 { 42 // CHECK: [[TMP0:%.*]] = bitcast <2 x float> %a to <8 x i8> 43 // CHECK: [[VCVTN_S32_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x float> 44 // CHECK: [[VCVTN_S32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtns.v2i32.v2f32(<2 x float> [[VCVTN_S32_V_I]]) #2 45 // CHECK: ret <2 x i32> [[VCVTN_S32_V1_I]] 46 int32x2_t test_vcvtn_s32_f32(float32x2_t a) { 47 return vcvtn_s32_f32(a); 48 } 49 50 // CHECK-LABEL: define <2 x i32> @test_vcvtn_u32_f32(<2 x float> %a) #0 { 51 // CHECK: [[TMP0:%.*]] = bitcast <2 x float> %a to <8 x i8> 52 // CHECK: [[VCVTN_U32_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x float> 53 // CHECK: [[VCVTN_U32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtnu.v2i32.v2f32(<2 x float> [[VCVTN_U32_V_I]]) #2 54 // CHECK: ret <2 x i32> [[VCVTN_U32_V1_I]] 55 uint32x2_t test_vcvtn_u32_f32(float32x2_t a) { 56 return vcvtn_u32_f32(a); 57 } 58 59 // CHECK-LABEL: define <4 x i32> @test_vcvtnq_s32_f32(<4 x float> %a) #0 { 60 // CHECK: [[TMP0:%.*]] = bitcast <4 x float> %a to <16 x i8> 61 // CHECK: [[VCVTNQ_S32_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x float> 62 // CHECK: [[VCVTNQ_S32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtns.v4i32.v4f32(<4 x float> [[VCVTNQ_S32_V_I]]) #2 63 // CHECK: ret <4 x i32> [[VCVTNQ_S32_V1_I]] 64 int32x4_t test_vcvtnq_s32_f32(float32x4_t a) { 65 return vcvtnq_s32_f32(a); 66 } 67 68 // CHECK-LABEL: define <4 x i32> @test_vcvtnq_u32_f32(<4 x float> %a) #0 { 69 // CHECK: [[TMP0:%.*]] = bitcast <4 x float> %a to <16 x i8> 70 // CHECK: [[VCVTNQ_U32_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x float> 71 // CHECK: [[VCVTNQ_U32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtnu.v4i32.v4f32(<4 x float> [[VCVTNQ_U32_V_I]]) #2 72 // CHECK: ret <4 x i32> [[VCVTNQ_U32_V1_I]] 73 uint32x4_t test_vcvtnq_u32_f32(float32x4_t a) { 74 return vcvtnq_u32_f32(a); 75 } 76 77 // CHECK-LABEL: define <2 x i32> @test_vcvtp_s32_f32(<2 x float> %a) #0 { 78 // CHECK: [[TMP0:%.*]] = bitcast <2 x float> %a to <8 x i8> 79 // CHECK: [[VCVTP_S32_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x float> 80 // CHECK: [[VCVTP_S32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtps.v2i32.v2f32(<2 x float> [[VCVTP_S32_V_I]]) #2 81 // CHECK: ret <2 x i32> [[VCVTP_S32_V1_I]] 82 int32x2_t test_vcvtp_s32_f32(float32x2_t a) { 83 return vcvtp_s32_f32(a); 84 } 85 86 // CHECK-LABEL: define <2 x i32> @test_vcvtp_u32_f32(<2 x float> %a) #0 { 87 // CHECK: [[TMP0:%.*]] = bitcast <2 x float> %a to <8 x i8> 88 // CHECK: [[VCVTP_U32_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x float> 89 // CHECK: [[VCVTP_U32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtpu.v2i32.v2f32(<2 x float> [[VCVTP_U32_V_I]]) #2 90 // CHECK: ret <2 x i32> [[VCVTP_U32_V1_I]] 91 uint32x2_t test_vcvtp_u32_f32(float32x2_t a) { 92 return vcvtp_u32_f32(a); 93 } 94 95 // CHECK-LABEL: define <4 x i32> @test_vcvtpq_s32_f32(<4 x float> %a) #0 { 96 // CHECK: [[TMP0:%.*]] = bitcast <4 x float> %a to <16 x i8> 97 // CHECK: [[VCVTPQ_S32_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x float> 98 // CHECK: [[VCVTPQ_S32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtps.v4i32.v4f32(<4 x float> [[VCVTPQ_S32_V_I]]) #2 99 // CHECK: ret <4 x i32> [[VCVTPQ_S32_V1_I]] 100 int32x4_t test_vcvtpq_s32_f32(float32x4_t a) { 101 return vcvtpq_s32_f32(a); 102 } 103 104 // CHECK-LABEL: define <4 x i32> @test_vcvtpq_u32_f32(<4 x float> %a) #0 { 105 // CHECK: [[TMP0:%.*]] = bitcast <4 x float> %a to <16 x i8> 106 // CHECK: [[VCVTPQ_U32_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x float> 107 // CHECK: [[VCVTPQ_U32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtpu.v4i32.v4f32(<4 x float> [[VCVTPQ_U32_V_I]]) #2 108 // CHECK: ret <4 x i32> [[VCVTPQ_U32_V1_I]] 109 uint32x4_t test_vcvtpq_u32_f32(float32x4_t a) { 110 return vcvtpq_u32_f32(a); 111 } 112 113 // CHECK-LABEL: define <2 x i32> @test_vcvtm_s32_f32(<2 x float> %a) #0 { 114 // CHECK: [[TMP0:%.*]] = bitcast <2 x float> %a to <8 x i8> 115 // CHECK: [[VCVTM_S32_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x float> 116 // CHECK: [[VCVTM_S32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtms.v2i32.v2f32(<2 x float> [[VCVTM_S32_V_I]]) #2 117 // CHECK: ret <2 x i32> [[VCVTM_S32_V1_I]] 118 int32x2_t test_vcvtm_s32_f32(float32x2_t a) { 119 return vcvtm_s32_f32(a); 120 } 121 122 // CHECK-LABEL: define <2 x i32> @test_vcvtm_u32_f32(<2 x float> %a) #0 { 123 // CHECK: [[TMP0:%.*]] = bitcast <2 x float> %a to <8 x i8> 124 // CHECK: [[VCVTM_U32_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x float> 125 // CHECK: [[VCVTM_U32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtmu.v2i32.v2f32(<2 x float> [[VCVTM_U32_V_I]]) #2 126 // CHECK: ret <2 x i32> [[VCVTM_U32_V1_I]] 127 uint32x2_t test_vcvtm_u32_f32(float32x2_t a) { 128 return vcvtm_u32_f32(a); 129 } 130 131 // CHECK-LABEL: define <4 x i32> @test_vcvtmq_s32_f32(<4 x float> %a) #0 { 132 // CHECK: [[TMP0:%.*]] = bitcast <4 x float> %a to <16 x i8> 133 // CHECK: [[VCVTMQ_S32_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x float> 134 // CHECK: [[VCVTMQ_S32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtms.v4i32.v4f32(<4 x float> [[VCVTMQ_S32_V_I]]) #2 135 // CHECK: ret <4 x i32> [[VCVTMQ_S32_V1_I]] 136 int32x4_t test_vcvtmq_s32_f32(float32x4_t a) { 137 return vcvtmq_s32_f32(a); 138 } 139 140 // CHECK-LABEL: define <4 x i32> @test_vcvtmq_u32_f32(<4 x float> %a) #0 { 141 // CHECK: [[TMP0:%.*]] = bitcast <4 x float> %a to <16 x i8> 142 // CHECK: [[VCVTMQ_U32_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x float> 143 // CHECK: [[VCVTMQ_U32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtmu.v4i32.v4f32(<4 x float> [[VCVTMQ_U32_V_I]]) #2 144 // CHECK: ret <4 x i32> [[VCVTMQ_U32_V1_I]] 145 uint32x4_t test_vcvtmq_u32_f32(float32x4_t a) { 146 return vcvtmq_u32_f32(a); 147 } 148
