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      1 #ifndef _ASM_X86_PERF_REGS_H
      2 #define _ASM_X86_PERF_REGS_H
      3 
      4 enum perf_event_x86_regs {
      5 	PERF_REG_X86_AX,
      6 	PERF_REG_X86_BX,
      7 	PERF_REG_X86_CX,
      8 	PERF_REG_X86_DX,
      9 	PERF_REG_X86_SI,
     10 	PERF_REG_X86_DI,
     11 	PERF_REG_X86_BP,
     12 	PERF_REG_X86_SP,
     13 	PERF_REG_X86_IP,
     14 	PERF_REG_X86_FLAGS,
     15 	PERF_REG_X86_CS,
     16 	PERF_REG_X86_SS,
     17 	PERF_REG_X86_DS,
     18 	PERF_REG_X86_ES,
     19 	PERF_REG_X86_FS,
     20 	PERF_REG_X86_GS,
     21 	PERF_REG_X86_R8,
     22 	PERF_REG_X86_R9,
     23 	PERF_REG_X86_R10,
     24 	PERF_REG_X86_R11,
     25 	PERF_REG_X86_R12,
     26 	PERF_REG_X86_R13,
     27 	PERF_REG_X86_R14,
     28 	PERF_REG_X86_R15,
     29 
     30 	PERF_REG_X86_32_MAX = PERF_REG_X86_GS + 1,
     31 	PERF_REG_X86_64_MAX = PERF_REG_X86_R15 + 1,
     32 };
     33 #endif /* _ASM_X86_PERF_REGS_H */
     34