1 set(LLVM_TARGET_DEFINITIONS Hexagon.td) 2 3 tablegen(LLVM HexagonGenAsmMatcher.inc -gen-asm-matcher) 4 tablegen(LLVM HexagonGenAsmWriter.inc -gen-asm-writer) 5 tablegen(LLVM HexagonGenCallingConv.inc -gen-callingconv) 6 tablegen(LLVM HexagonGenDAGISel.inc -gen-dag-isel) 7 tablegen(LLVM HexagonGenDFAPacketizer.inc -gen-dfa-packetizer) 8 tablegen(LLVM HexagonGenDisassemblerTables.inc -gen-disassembler) 9 tablegen(LLVM HexagonGenInstrInfo.inc -gen-instr-info) 10 tablegen(LLVM HexagonGenMCCodeEmitter.inc -gen-emitter) 11 tablegen(LLVM HexagonGenRegisterInfo.inc -gen-register-info) 12 tablegen(LLVM HexagonGenSubtargetInfo.inc -gen-subtarget) 13 add_public_tablegen_target(HexagonCommonTableGen) 14 15 add_llvm_target(HexagonCodeGen 16 BitTracker.cpp 17 HexagonAsmPrinter.cpp 18 HexagonBitSimplify.cpp 19 HexagonBitTracker.cpp 20 HexagonBlockRanges.cpp 21 HexagonBranchRelaxation.cpp 22 HexagonCFGOptimizer.cpp 23 HexagonCommonGEP.cpp 24 HexagonCopyToCombine.cpp 25 HexagonEarlyIfConv.cpp 26 HexagonExpandCondsets.cpp 27 HexagonFixupHwLoops.cpp 28 HexagonFrameLowering.cpp 29 HexagonGenExtract.cpp 30 HexagonGenInsert.cpp 31 HexagonGenMux.cpp 32 HexagonGenPredicate.cpp 33 HexagonHardwareLoops.cpp 34 HexagonInstrInfo.cpp 35 HexagonISelDAGToDAG.cpp 36 HexagonISelLowering.cpp 37 HexagonMachineFunctionInfo.cpp 38 HexagonMachineScheduler.cpp 39 HexagonMCInstLower.cpp 40 HexagonNewValueJump.cpp 41 HexagonOptAddrMode.cpp 42 HexagonOptimizeSZextends.cpp 43 HexagonPeephole.cpp 44 HexagonRDF.cpp 45 HexagonRDFOpt.cpp 46 HexagonRegisterInfo.cpp 47 HexagonSelectionDAGInfo.cpp 48 HexagonSplitConst32AndConst64.cpp 49 HexagonSplitDouble.cpp 50 HexagonStoreWidening.cpp 51 HexagonSubtarget.cpp 52 HexagonTargetMachine.cpp 53 HexagonTargetObjectFile.cpp 54 HexagonTargetTransformInfo.cpp 55 HexagonVLIWPacketizer.cpp 56 RDFCopy.cpp 57 RDFDeadCode.cpp 58 RDFGraph.cpp 59 RDFLiveness.cpp 60 ) 61 62 add_subdirectory(AsmParser) 63 add_subdirectory(TargetInfo) 64 add_subdirectory(MCTargetDesc) 65 add_subdirectory(Disassembler) 66