1 ; RUN: llc < %s -mtriple=arm64-apple-ios7.0 -aarch64-neon-syntax=apple -verify-machineinstrs 2 3 ; CHECK: fpr128 4 ; CHECK: ld1.2d 5 ; CHECK: str q 6 ; CHECK: inlineasm 7 ; CHECK: ldr q 8 ; CHECK: st1.2d 9 define void @fpr128(<4 x float>* %p) nounwind ssp { 10 entry: 11 %x = load <4 x float>, <4 x float>* %p, align 16 12 call void asm sideeffect "; inlineasm", "~{q0},~{q1},~{q2},~{q3},~{q4},~{q5},~{q6},~{q7},~{q8},~{q9},~{q10},~{q11},~{q12},~{q13},~{q14},~{q15},~{q16},~{q17},~{q18},~{q19},~{q20},~{q21},~{q22},~{q23},~{q24},~{q25},~{q26},~{q27},~{q28},~{q29},~{q30},~{q31},~{x0},~{x1},~{x2},~{x3},~{x4},~{x5},~{x6},~{x7},~{x8},~{x9},~{x10},~{x11},~{x12},~{x13},~{x14},~{x15},~{x16},~{x17},~{x18},~{x19},~{x20},~{x21},~{x22},~{x23},~{x24},~{x25},~{x26},~{x27},~{x28},~{fp},~{lr},~{sp},~{memory}"() nounwind 13 store <4 x float> %x, <4 x float>* %p, align 16 14 ret void 15 } 16
