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      1 ; RUN: llc %s -o - -enable-shrink-wrap=true | FileCheck %s --check-prefix=CHECK --check-prefix=ENABLE
      2 ; RUN: llc %s -o - -enable-shrink-wrap=false | FileCheck %s --check-prefix=CHECK --check-prefix=DISABLE
      3 ; We cannot merge this test with the main test for shrink-wrapping, because
      4 ; the code path we want to exerce is not taken with ios lowering.
      5 target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n8:16:32-S64"
      6 target triple = "armv7--linux-gnueabi"
      7 
      8 @skip = internal unnamed_addr constant [2 x i8] c"\01\01", align 1
      9 
     10 ; Check that we do not restore the before having used the saved CSRs.
     11 ; This happened because of a bad use of the post-dominance property.
     12 ; The exit block of the loop happens to also lead to defs/uses of CSRs.
     13 ; It also post-dominates the loop body and we use to generate invalid
     14 ; restore sequence. I.e., we restored too early.
     15 ;
     16 ; CHECK-LABEL: wrongUseOfPostDominate:
     17 ;
     18 ; The prologue is the first thing happening in the function
     19 ; without shrink-wrapping.
     20 ; DISABLE: push
     21 ;
     22 ; CHECK: cmp r1, #0
     23 ;
     24 ; With shrink-wrapping, we branch to a pre-header, where the prologue
     25 ; is located.
     26 ; ENABLE-NEXT: blt [[LOOP_PREHEADER:[.a-zA-Z0-9_]+]]
     27 ; Without shrink-wrapping, we go straight into the loop.
     28 ; DISABLE-NEXT: blt [[LOOP_HEADER:[.a-zA-Z0-9_]+]]
     29 ;
     30 ; CHECK: @ %if.end29
     31 ; DISABLE-NEXT: pop
     32 ; ENABLE-NEXT: bx lr
     33 ;
     34 ; ENABLE: [[LOOP_PREHEADER]]
     35 ; ENABLE: push
     36 ; We must not find a pop here, otherwise that means we are in the loop
     37 ; and are restoring before using the saved CSRs.
     38 ; ENABLE-NOT: pop
     39 ; ENALBE-NEXT: [[LOOP_HEADER:[.a-zA-Z0-9_]+]]: @ %while.cond2.outer
     40 ;
     41 ; DISABLE: [[LOOP_HEADER]]: @ %while.cond2.outer
     42 ;
     43 ; ENABLE-NOT: pop
     44 ;
     45 ; CHECK: @ %while.cond2
     46 ; CHECK: add
     47 ; CHECK-NEXT: cmp r{{[0-1]+}}, #1
     48 ; Set the return value.
     49 ; CHECK-NEXT: moveq r0,
     50 ; CHECK-NEXT: popeq
     51 ;
     52 ; Use the back edge to check we get the label of the loop right.
     53 ; This is to make sure we check the right loop pattern.
     54 ; CHECK:  @ %while.body24.land.rhs14_crit_edge
     55 ; CHECK: cmp r{{[0-9]+}}, #192
     56 ; CHECK-NEXT bhs [[LOOP_HEADER]]
     57 define fastcc i8* @wrongUseOfPostDominate(i8* readonly %s, i32 %off, i8* readnone %lim) {
     58 entry:
     59   %cmp = icmp sgt i32 %off, -1
     60   br i1 %cmp, label %while.cond.preheader, label %while.cond2.outer
     61 
     62 while.cond.preheader:                             ; preds = %entry
     63   %tobool4 = icmp ne i32 %off, 0
     64   %cmp15 = icmp ult i8* %s, %lim
     65   %sel66 = and i1 %tobool4, %cmp15
     66   br i1 %sel66, label %while.body, label %if.end29
     67 
     68 while.body:                                       ; preds = %while.body, %while.cond.preheader
     69   %s.addr.08 = phi i8* [ %add.ptr, %while.body ], [ %s, %while.cond.preheader ]
     70   %off.addr.07 = phi i32 [ %dec, %while.body ], [ %off, %while.cond.preheader ]
     71   %dec = add nsw i32 %off.addr.07, -1
     72   %tmp = load i8, i8* %s.addr.08, align 1, !tbaa !2
     73   %idxprom = zext i8 %tmp to i32
     74   %arrayidx = getelementptr inbounds [2 x i8], [2 x i8]* @skip, i32 0, i32 %idxprom
     75   %tmp1 = load i8, i8* %arrayidx, align 1, !tbaa !2
     76   %conv = zext i8 %tmp1 to i32
     77   %add.ptr = getelementptr inbounds i8, i8* %s.addr.08, i32 %conv
     78   %tobool = icmp ne i32 %off.addr.07, 1
     79   %cmp1 = icmp ult i8* %add.ptr, %lim
     80   %sel6 = and i1 %tobool, %cmp1
     81   br i1 %sel6, label %while.body, label %if.end29
     82 
     83 while.cond2.outer:                                ; preds = %while.body24.land.rhs14_crit_edge, %while.body24, %land.rhs14.preheader, %if.then7, %entry
     84   %off.addr.1.ph = phi i32 [ %off, %entry ], [ %inc, %land.rhs14.preheader ], [ %inc, %if.then7 ], [ %inc, %while.body24.land.rhs14_crit_edge ], [ %inc, %while.body24 ]
     85   %s.addr.1.ph = phi i8* [ %s, %entry ], [ %incdec.ptr, %land.rhs14.preheader ], [ %incdec.ptr, %if.then7 ], [ %lsr.iv, %while.body24.land.rhs14_crit_edge ], [ %lsr.iv, %while.body24 ]
     86   br label %while.cond2
     87 
     88 while.cond2:                                      ; preds = %while.body4, %while.cond2.outer
     89   %off.addr.1 = phi i32 [ %inc, %while.body4 ], [ %off.addr.1.ph, %while.cond2.outer ]
     90   %inc = add nsw i32 %off.addr.1, 1
     91   %tobool3 = icmp eq i32 %off.addr.1, 0
     92   br i1 %tobool3, label %if.end29, label %while.body4
     93 
     94 while.body4:                                      ; preds = %while.cond2
     95   %tmp2 = icmp ugt i8* %s.addr.1.ph, %lim
     96   br i1 %tmp2, label %if.then7, label %while.cond2
     97 
     98 if.then7:                                         ; preds = %while.body4
     99   %incdec.ptr = getelementptr inbounds i8, i8* %s.addr.1.ph, i32 -1
    100   %tmp3 = load i8, i8* %incdec.ptr, align 1, !tbaa !2
    101   %conv1525 = zext i8 %tmp3 to i32
    102   %tobool9 = icmp slt i8 %tmp3, 0
    103   %cmp129 = icmp ugt i8* %incdec.ptr, %lim
    104   %or.cond13 = and i1 %tobool9, %cmp129
    105   br i1 %or.cond13, label %land.rhs14.preheader, label %while.cond2.outer
    106 
    107 land.rhs14.preheader:                             ; preds = %if.then7
    108   %cmp1624 = icmp slt i8 %tmp3, 0
    109   %cmp2026 = icmp ult i32 %conv1525, 192
    110   %or.cond27 = and i1 %cmp1624, %cmp2026
    111   br i1 %or.cond27, label %while.body24.preheader, label %while.cond2.outer
    112 
    113 while.body24.preheader:                           ; preds = %land.rhs14.preheader
    114   %scevgep = getelementptr i8, i8* %s.addr.1.ph, i32 -2
    115   br label %while.body24
    116 
    117 while.body24:                                     ; preds = %while.body24.land.rhs14_crit_edge, %while.body24.preheader
    118   %lsr.iv = phi i8* [ %scevgep, %while.body24.preheader ], [ %scevgep34, %while.body24.land.rhs14_crit_edge ]
    119   %cmp12 = icmp ugt i8* %lsr.iv, %lim
    120   br i1 %cmp12, label %while.body24.land.rhs14_crit_edge, label %while.cond2.outer
    121 
    122 while.body24.land.rhs14_crit_edge:                ; preds = %while.body24
    123   %.pre = load i8, i8* %lsr.iv, align 1, !tbaa !2
    124   %cmp16 = icmp slt i8 %.pre, 0
    125   %conv15 = zext i8 %.pre to i32
    126   %cmp20 = icmp ult i32 %conv15, 192
    127   %or.cond = and i1 %cmp16, %cmp20
    128   %scevgep34 = getelementptr i8, i8* %lsr.iv, i32 -1
    129   br i1 %or.cond, label %while.body24, label %while.cond2.outer
    130 
    131 if.end29:                                         ; preds = %while.cond2, %while.body, %while.cond.preheader
    132   %s.addr.3 = phi i8* [ %s, %while.cond.preheader ], [ %add.ptr, %while.body ], [ %s.addr.1.ph, %while.cond2 ]
    133   ret i8* %s.addr.3
    134 }
    135 
    136 !llvm.module.flags = !{!0, !1}
    137 
    138 !0 = !{i32 1, !"wchar_size", i32 4}
    139 !1 = !{i32 1, !"min_enum_size", i32 4}
    140 !2 = !{!3, !3, i64 0}
    141 !3 = !{!"omnipotent char", !4, i64 0}
    142 !4 = !{!"Simple C/C++ TBAA"}
    143