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      1 ; RUN: llc -march=hexagon -O0 < %s | FileCheck %s
      2 ; RUN: llc -march=hexagon -O0 < %s | FileCheck -check-prefix=CHECK-CALL %s
      3 ; Hexagon Programmer's Reference Manual 11.1.2 ALU32/PERM
      4 
      5 ; CHECK-CALL-NOT: call
      6 
      7 ; Combine words into doubleword
      8 declare i64 @llvm.hexagon.A4.combineri(i32, i32)
      9 define i64 @A4_combineri(i32 %a) {
     10   %z = call i64 @llvm.hexagon.A4.combineri(i32 %a, i32 0)
     11   ret i64 %z
     12 }
     13 ; CHECK: = combine({{.*}}, #0)
     14 
     15 declare i64 @llvm.hexagon.A4.combineir(i32, i32)
     16 define i64 @A4_combineir(i32 %a) {
     17   %z = call i64 @llvm.hexagon.A4.combineir(i32 0, i32 %a)
     18   ret i64 %z
     19 }
     20 ; CHECK: = combine(#0, {{.*}})
     21 
     22 declare i64 @llvm.hexagon.A2.combineii(i32, i32)
     23 define i64 @A2_combineii() {
     24   %z = call i64 @llvm.hexagon.A2.combineii(i32 0, i32 0)
     25   ret i64 %z
     26 }
     27 ; CHECK: = combine(#0, #0)
     28 
     29 declare i32 @llvm.hexagon.A2.combine.hh(i32, i32)
     30 define i32 @A2_combine_hh(i32 %a, i32 %b) {
     31   %z = call i32 @llvm.hexagon.A2.combine.hh(i32 %a, i32 %b)
     32   ret i32 %z
     33 }
     34 ; CHECK: = combine({{.*}}, {{.*}})
     35 
     36 declare i32 @llvm.hexagon.A2.combine.hl(i32, i32)
     37 define i32 @A2_combine_hl(i32 %a, i32 %b) {
     38   %z = call i32 @llvm.hexagon.A2.combine.hl(i32 %a, i32 %b)
     39   ret i32 %z
     40 }
     41 ; CHECK: = combine({{.*}}, {{.*}})
     42 
     43 declare i32 @llvm.hexagon.A2.combine.lh(i32, i32)
     44 define i32 @A2_combine_lh(i32 %a, i32 %b) {
     45   %z = call i32 @llvm.hexagon.A2.combine.lh(i32 %a, i32 %b)
     46   ret i32 %z
     47 }
     48 ; CHECK: = combine({{.*}}, {{.*}})
     49 
     50 declare i32 @llvm.hexagon.A2.combine.ll(i32, i32)
     51 define i32 @A2_combine_ll(i32 %a, i32 %b) {
     52   %z = call i32 @llvm.hexagon.A2.combine.ll(i32 %a, i32 %b)
     53   ret i32 %z
     54 }
     55 ; CHECK: = combine({{.*}}, {{.*}})
     56 
     57 declare i64 @llvm.hexagon.A2.combinew(i32, i32)
     58 define i64 @A2_combinew(i32 %a, i32 %b) {
     59   %z = call i64 @llvm.hexagon.A2.combinew(i32 %a, i32 %b)
     60   ret i64 %z
     61 }
     62 ; CHECK: = combine({{.*}}, {{.*}})
     63 
     64 ; Mux
     65 declare i32 @llvm.hexagon.C2.muxri(i32, i32, i32)
     66 define i32 @C2_muxri(i32 %a, i32 %b) {
     67   %z = call i32 @llvm.hexagon.C2.muxri(i32 %a, i32 0, i32 %b)
     68   ret i32 %z
     69 }
     70 ; CHECK: = mux({{.*}}, #0, {{.*}})
     71 
     72 declare i32 @llvm.hexagon.C2.muxir(i32, i32, i32)
     73 define i32 @C2_muxir(i32 %a, i32 %b) {
     74   %z = call i32 @llvm.hexagon.C2.muxir(i32 %a, i32 %b, i32 0)
     75   ret i32 %z
     76 }
     77 ; CHECK: = mux({{.*}}, {{.*}}, #0)
     78 
     79 declare i32 @llvm.hexagon.C2.mux(i32, i32, i32)
     80 define i32 @C2_mux(i32 %a, i32 %b, i32 %c) {
     81   %z = call i32 @llvm.hexagon.C2.mux(i32 %a, i32 %b, i32 %c)
     82   ret i32 %z
     83 }
     84 ; CHECK: = mux({{.*}}, {{.*}}, {{.*}})
     85 
     86 ; Shift word by 16
     87 declare i32 @llvm.hexagon.A2.aslh(i32)
     88 define i32 @A2_aslh(i32 %a) {
     89   %z = call i32 @llvm.hexagon.A2.aslh(i32 %a)
     90   ret i32 %z
     91 }
     92 ; CHECK: = aslh({{.*}})
     93 
     94 declare i32 @llvm.hexagon.A2.asrh(i32)
     95 define i32 @A2_asrh(i32 %a) {
     96   %z = call i32 @llvm.hexagon.A2.asrh(i32 %a)
     97   ret i32 %z
     98 }
     99 ; CHECK: = asrh({{.*}})
    100 
    101 ; Pack high and low halfwords
    102 declare i64 @llvm.hexagon.S2.packhl(i32, i32)
    103 define i64 @S2_packhl(i32 %a, i32 %b) {
    104   %z = call i64 @llvm.hexagon.S2.packhl(i32 %a, i32 %b)
    105   ret i64 %z
    106 }
    107 ; CHECK: = packhl({{.*}}, {{.*}})
    108