1 ; RUN: llc -O2 -march=hexagon < %s | FileCheck %s 2 ; CHECK: p{{[0-9]}} = or(p{{[0-9]}}, and(p{{[0-9]}}, p{{[0-9]}})) 3 4 target triple = "hexagon" 5 6 define i32 @foo(i64* nocapture %p, i64* nocapture %q) nounwind readonly { 7 entry: 8 %incdec.ptr = getelementptr inbounds i64, i64* %p, i32 1 9 %0 = load i64, i64* %p, align 8, !tbaa !0 10 %incdec.ptr1 = getelementptr inbounds i64, i64* %q, i32 1 11 %1 = load i64, i64* %q, align 8, !tbaa !0 12 %2 = tail call i32 @llvm.hexagon.A2.vcmpwgtu(i64 %0, i64 %1) 13 %incdec.ptr2 = getelementptr inbounds i64, i64* %p, i32 2 14 %3 = load i64, i64* %incdec.ptr, align 8, !tbaa !0 15 %incdec.ptr3 = getelementptr inbounds i64, i64* %q, i32 2 16 %4 = load i64, i64* %incdec.ptr1, align 8, !tbaa !0 17 %5 = tail call i32 @llvm.hexagon.A2.vcmpwgtu(i64 %3, i64 %4) 18 %6 = load i64, i64* %incdec.ptr2, align 8, !tbaa !0 19 %7 = load i64, i64* %incdec.ptr3, align 8, !tbaa !0 20 %8 = tail call i32 @llvm.hexagon.A2.vcmpwgtu(i64 %6, i64 %7) 21 %and = and i32 %5, %2 22 %or = or i32 %8, %and 23 ret i32 %or 24 } 25 26 declare i32 @llvm.hexagon.A2.vcmpwgtu(i64, i64) nounwind readnone 27 28 !0 = !{!"long long", !1} 29 !1 = !{!"omnipotent char", !2} 30 !2 = !{!"Simple C/C++ TBAA"} 31
