1 ; RUN: llc -march=mips -mcpu=mips32r2 < %s | FileCheck %s 2 ; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips32r2 -mattr=+mips16 < %s | FileCheck %s -check-prefix=mips16 3 ; RUN: llc -march=mips -mcpu=mips32r3 -mattr=+micromips < %s | FileCheck %s \ 4 ; RUN: -check-prefix=MM32 5 ; RUN: llc -march=mips -mcpu=mips32r6 -mattr=+micromips < %s | FileCheck %s \ 6 ; RUN: -check-prefix=MM32 7 8 ; CHECK: rotrv $2, $4 9 ; mips16: .ent rot0 10 ; MM32: li16 $2, 32 11 ; MM32: subu16 $2, $2, $5 12 ; MM32: rotrv $2, $4, $2 13 define i32 @rot0(i32 %a, i32 %b) nounwind readnone { 14 entry: 15 %shl = shl i32 %a, %b 16 %sub = sub i32 32, %b 17 %shr = lshr i32 %a, %sub 18 %or = or i32 %shr, %shl 19 ret i32 %or 20 } 21 22 ; CHECK: rotr $2, $4, 22 23 ; mips16: .ent rot1 24 ; MM32: rotr $2, $4, 22 25 define i32 @rot1(i32 %a) nounwind readnone { 26 entry: 27 %shl = shl i32 %a, 10 28 %shr = lshr i32 %a, 22 29 %or = or i32 %shl, %shr 30 ret i32 %or 31 } 32 33 ; CHECK: rotrv $2, $4, $5 34 ; mips16: .ent rot2 35 ; MM32: rotrv $2, $4, $5 36 define i32 @rot2(i32 %a, i32 %b) nounwind readnone { 37 entry: 38 %shr = lshr i32 %a, %b 39 %sub = sub i32 32, %b 40 %shl = shl i32 %a, %sub 41 %or = or i32 %shl, %shr 42 ret i32 %or 43 } 44 45 ; CHECK: rotr $2, $4, 10 46 ; mips16: .ent rot3 47 ; MM32: rotr $2, $4, 10 48 define i32 @rot3(i32 %a) nounwind readnone { 49 entry: 50 %shr = lshr i32 %a, 10 51 %shl = shl i32 %a, 22 52 %or = or i32 %shr, %shl 53 ret i32 %or 54 } 55 56
