1 ; RUN: llc -O3 -mtriple=x86_64-unknown -mcpu=x86-64 -mattr=+sse2,+pclmul < %s | FileCheck %s --check-prefix=SSE 2 ; RUN: llc -O3 -mtriple=x86_64-unknown -mcpu=x86-64 -mattr=+avx2,+pclmul < %s | FileCheck %s --check-prefix=AVX 3 4 declare <2 x i64> @llvm.x86.pclmulqdq(<2 x i64>, <2 x i64>, i8) nounwind readnone 5 6 define <2 x i64> @commute_lq_lq(<2 x i64>* %a0, <2 x i64> %a1) #0 { 7 ;SSE-LABEL: commute_lq_lq 8 ;SSE: pclmulqdq $0, (%rdi), %xmm0 9 ;SSE-NEXT: retq 10 11 ;AVX-LABEL: commute_lq_lq 12 ;AVX: vpclmulqdq $0, (%rdi), %xmm0, %xmm0 13 ;AVX-NEXT: retq 14 15 %1 = load <2 x i64>, <2 x i64>* %a0 16 %2 = call <2 x i64> @llvm.x86.pclmulqdq(<2 x i64> %1, <2 x i64> %a1, i8 0) 17 ret <2 x i64> %2 18 } 19 20 define <2 x i64> @commute_lq_hq(<2 x i64>* %a0, <2 x i64> %a1) #0 { 21 ;SSE-LABEL: commute_lq_hq 22 ;SSE: pclmulqdq $1, (%rdi), %xmm0 23 ;SSE-NEXT: retq 24 25 ;AVX-LABEL: commute_lq_hq 26 ;AVX: vpclmulqdq $1, (%rdi), %xmm0, %xmm0 27 ;AVX-NEXT: retq 28 29 %1 = load <2 x i64>, <2 x i64>* %a0 30 %2 = call <2 x i64> @llvm.x86.pclmulqdq(<2 x i64> %1, <2 x i64> %a1, i8 16) 31 ret <2 x i64> %2 32 } 33 34 define <2 x i64> @commute_hq_lq(<2 x i64>* %a0, <2 x i64> %a1) #0 { 35 ;SSE-LABEL: commute_hq_lq 36 ;SSE: pclmulqdq $16, (%rdi), %xmm0 37 ;SSE-NEXT: retq 38 39 ;AVX-LABEL: commute_hq_lq 40 ;AVX: vpclmulqdq $16, (%rdi), %xmm0, %xmm0 41 ;AVX-NEXT: retq 42 43 %1 = load <2 x i64>, <2 x i64>* %a0 44 %2 = call <2 x i64> @llvm.x86.pclmulqdq(<2 x i64> %1, <2 x i64> %a1, i8 1) 45 ret <2 x i64> %2 46 } 47 48 define <2 x i64> @commute_hq_hq(<2 x i64>* %a0, <2 x i64> %a1) #0 { 49 ;SSE-LABEL: commute_hq_hq 50 ;SSE: pclmulqdq $17, (%rdi), %xmm0 51 ;SSE-NEXT: retq 52 53 ;AVX-LABEL: commute_hq_hq 54 ;AVX: vpclmulqdq $17, (%rdi), %xmm0, %xmm0 55 ;AVX-NEXT: retq 56 57 %1 = load <2 x i64>, <2 x i64>* %a0 58 %2 = call <2 x i64> @llvm.x86.pclmulqdq(<2 x i64> %1, <2 x i64> %a1, i8 17) 59 ret <2 x i64> %2 60 } 61
