1 ; RUN: llc < %s -x86-early-ifcvt -stress-early-ifcvt | FileCheck %s 2 target triple = "x86_64-apple-macosx10.8.0" 3 4 ; CHECK: mm2 5 define i32 @mm2(i32* nocapture %p, i32 %n) nounwind uwtable readonly ssp { 6 entry: 7 br label %do.body 8 9 ; CHECK: do.body 10 ; Loop body has no branches before the backedge. 11 ; CHECK-NOT: LBB 12 do.body: 13 %max.0 = phi i32 [ 0, %entry ], [ %max.1, %do.cond ] 14 %min.0 = phi i32 [ 0, %entry ], [ %min.1, %do.cond ] 15 %n.addr.0 = phi i32 [ %n, %entry ], [ %dec, %do.cond ] 16 %p.addr.0 = phi i32* [ %p, %entry ], [ %incdec.ptr, %do.cond ] 17 %incdec.ptr = getelementptr inbounds i32, i32* %p.addr.0, i64 1 18 %0 = load i32, i32* %p.addr.0, align 4 19 %cmp = icmp sgt i32 %0, %max.0 20 br i1 %cmp, label %do.cond, label %if.else 21 22 if.else: 23 %cmp1 = icmp slt i32 %0, %min.0 24 %.min.0 = select i1 %cmp1, i32 %0, i32 %min.0 25 br label %do.cond 26 27 do.cond: 28 %max.1 = phi i32 [ %0, %do.body ], [ %max.0, %if.else ] 29 %min.1 = phi i32 [ %min.0, %do.body ], [ %.min.0, %if.else ] 30 ; CHECK: decl %esi 31 ; CHECK: jne LBB 32 %dec = add i32 %n.addr.0, -1 33 %tobool = icmp eq i32 %dec, 0 34 br i1 %tobool, label %do.end, label %do.body 35 36 do.end: 37 %sub = sub nsw i32 %max.1, %min.1 38 ret i32 %sub 39 } 40 41 ; CHECK: multipreds 42 ; Deal with alternative tail predecessors 43 ; CHECK-NOT: LBB 44 ; CHECK: cmov 45 ; CHECK-NOT: LBB 46 ; CHECK: cmov 47 ; CHECK-NOT: LBB 48 ; CHECK: fprintf 49 50 define void @multipreds(i32 %sw) nounwind uwtable ssp { 51 entry: 52 switch i32 %sw, label %if.then29 [ 53 i32 0, label %if.then37 54 i32 127, label %if.end41 55 ] 56 57 if.then29: 58 br label %if.end41 59 60 if.then37: 61 br label %if.end41 62 63 if.end41: 64 %exit_status.0 = phi i32 [ 2, %if.then29 ], [ 0, %if.then37 ], [ 66, %entry ] 65 call void (...) @fprintf(i32 %exit_status.0) nounwind 66 unreachable 67 } 68 69 declare void @fprintf(...) nounwind 70 71 ; CHECK: BZ2_decompress 72 ; This test case contains irreducible control flow, so MachineLoopInfo doesn't 73 ; recognize the cycle in the CFG. This would confuse MachineTraceMetrics. 74 define void @BZ2_decompress(i8* %s) nounwind ssp { 75 entry: 76 switch i32 undef, label %sw.default [ 77 i32 39, label %if.end.sw.bb2050_crit_edge 78 i32 36, label %sw.bb1788 79 i32 37, label %if.end.sw.bb1855_crit_edge 80 i32 40, label %sw.bb2409 81 i32 38, label %sw.bb1983 82 i32 44, label %if.end.sw.bb3058_crit_edge 83 ] 84 85 if.end.sw.bb3058_crit_edge: ; preds = %entry 86 br label %save_state_and_return 87 88 if.end.sw.bb1855_crit_edge: ; preds = %entry 89 br label %save_state_and_return 90 91 if.end.sw.bb2050_crit_edge: ; preds = %entry 92 br label %sw.bb2050 93 94 sw.bb1788: ; preds = %entry 95 br label %save_state_and_return 96 97 sw.bb1983: ; preds = %entry 98 br i1 undef, label %save_state_and_return, label %if.then1990 99 100 if.then1990: ; preds = %sw.bb1983 101 br label %while.body2038 102 103 while.body2038: ; preds = %sw.bb2050, %if.then1990 104 %groupPos.8 = phi i32 [ 0, %if.then1990 ], [ %groupPos.9, %sw.bb2050 ] 105 br i1 undef, label %save_state_and_return, label %if.end2042 106 107 if.end2042: ; preds = %while.body2038 108 br i1 undef, label %if.end2048, label %while.end2104 109 110 if.end2048: ; preds = %if.end2042 111 %bsLive2054.pre = getelementptr inbounds i8, i8* %s, i32 8 112 br label %sw.bb2050 113 114 sw.bb2050: ; preds = %if.end2048, %if.end.sw.bb2050_crit_edge 115 %groupPos.9 = phi i32 [ 0, %if.end.sw.bb2050_crit_edge ], [ %groupPos.8, %if.end2048 ] 116 %and2064 = and i32 undef, 1 117 br label %while.body2038 118 119 while.end2104: ; preds = %if.end2042 120 br i1 undef, label %save_state_and_return, label %if.end2117 121 122 if.end2117: ; preds = %while.end2104 123 br i1 undef, label %while.body2161.lr.ph, label %while.body2145.lr.ph 124 125 while.body2145.lr.ph: ; preds = %if.end2117 126 br label %save_state_and_return 127 128 while.body2161.lr.ph: ; preds = %if.end2117 129 br label %save_state_and_return 130 131 sw.bb2409: ; preds = %entry 132 br label %save_state_and_return 133 134 sw.default: ; preds = %entry 135 call void @BZ2_bz__AssertH__fail() nounwind 136 br label %save_state_and_return 137 138 save_state_and_return: 139 %groupPos.14 = phi i32 [ 0, %sw.default ], [ %groupPos.8, %while.body2038 ], [ %groupPos.8, %while.end2104 ], [ 0, %if.end.sw.bb3058_crit_edge ], [ 0, %if.end.sw.bb1855_crit_edge ], [ %groupPos.8, %while.body2161.lr.ph ], [ %groupPos.8, %while.body2145.lr.ph ], [ 0, %sw.bb2409 ], [ 0, %sw.bb1788 ], [ 0, %sw.bb1983 ] 140 store i32 %groupPos.14, i32* undef, align 4 141 ret void 142 } 143 144 declare void @BZ2_bz__AssertH__fail() 145 146 ; Make sure we don't speculate on div/idiv instructions 147 ; CHECK: test_idiv 148 ; CHECK-NOT: cmov 149 define i32 @test_idiv(i32 %a, i32 %b) nounwind uwtable readnone ssp { 150 %1 = icmp eq i32 %b, 0 151 br i1 %1, label %4, label %2 152 153 ; <label>:2 ; preds = %0 154 %3 = sdiv i32 %a, %b 155 br label %4 156 157 ; <label>:4 ; preds = %0, %2 158 %5 = phi i32 [ %3, %2 ], [ %a, %0 ] 159 ret i32 %5 160 } 161 162 ; CHECK: test_div 163 ; CHECK-NOT: cmov 164 define i32 @test_div(i32 %a, i32 %b) nounwind uwtable readnone ssp { 165 %1 = icmp eq i32 %b, 0 166 br i1 %1, label %4, label %2 167 168 ; <label>:2 ; preds = %0 169 %3 = udiv i32 %a, %b 170 br label %4 171 172 ; <label>:4 ; preds = %0, %2 173 %5 = phi i32 [ %3, %2 ], [ %a, %0 ] 174 ret i32 %5 175 } 176
