1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=sse2 | FileCheck %s --check-prefix=SSE 3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx | FileCheck %s --check-prefix=AVX 4 5 ; Verify that we select the correct version of the instruction that stores the low 64-bits 6 ; of a 128-bit vector. We want to avoid int/fp domain crossing penalties, so ignore the 7 ; bitcast ops and choose: 8 ; 9 ; movlps for floats 10 ; movlpd for doubles 11 ; movq for integers 12 13 define void @store_floats(<4 x float> %x, i64* %p) { 14 ; SSE-LABEL: store_floats: 15 ; SSE: # BB#0: 16 ; SSE-NEXT: addps %xmm0, %xmm0 17 ; SSE-NEXT: movlps %xmm0, (%rdi) 18 ; SSE-NEXT: retq 19 ; 20 ; AVX-LABEL: store_floats: 21 ; AVX: # BB#0: 22 ; AVX-NEXT: vaddps %xmm0, %xmm0, %xmm0 23 ; AVX-NEXT: vmovlps %xmm0, (%rdi) 24 ; AVX-NEXT: retq 25 %a = fadd <4 x float> %x, %x 26 %b = shufflevector <4 x float> %a, <4 x float> undef, <2 x i32> <i32 0, i32 1> 27 %c = bitcast <2 x float> %b to i64 28 store i64 %c, i64* %p 29 ret void 30 } 31 32 define void @store_double(<2 x double> %x, i64* %p) { 33 ; SSE-LABEL: store_double: 34 ; SSE: # BB#0: 35 ; SSE-NEXT: addpd %xmm0, %xmm0 36 ; SSE-NEXT: movlpd %xmm0, (%rdi) 37 ; SSE-NEXT: retq 38 ; 39 ; AVX-LABEL: store_double: 40 ; AVX: # BB#0: 41 ; AVX-NEXT: vaddpd %xmm0, %xmm0, %xmm0 42 ; AVX-NEXT: vmovlpd %xmm0, (%rdi) 43 ; AVX-NEXT: retq 44 %a = fadd <2 x double> %x, %x 45 %b = extractelement <2 x double> %a, i32 0 46 %c = bitcast double %b to i64 47 store i64 %c, i64* %p 48 ret void 49 } 50 51 define void @store_int(<4 x i32> %x, <2 x float>* %p) { 52 ; SSE-LABEL: store_int: 53 ; SSE: # BB#0: 54 ; SSE-NEXT: paddd %xmm0, %xmm0 55 ; SSE-NEXT: movq %xmm0, (%rdi) 56 ; SSE-NEXT: retq 57 ; 58 ; AVX-LABEL: store_int: 59 ; AVX: # BB#0: 60 ; AVX-NEXT: vpaddd %xmm0, %xmm0, %xmm0 61 ; AVX-NEXT: vmovq %xmm0, (%rdi) 62 ; AVX-NEXT: retq 63 %a = add <4 x i32> %x, %x 64 %b = shufflevector <4 x i32> %a, <4 x i32> undef, <2 x i32> <i32 0, i32 1> 65 %c = bitcast <2 x i32> %b to <2 x float> 66 store <2 x float> %c, <2 x float>* %p 67 ret void 68 } 69 70 define void @store_h_double(<2 x double> %x, i64* %p) { 71 ; SSE-LABEL: store_h_double: 72 ; SSE: # BB#0: 73 ; SSE-NEXT: addpd %xmm0, %xmm0 74 ; SSE-NEXT: movhpd %xmm0, (%rdi) 75 ; SSE-NEXT: retq 76 ; 77 ; AVX-LABEL: store_h_double: 78 ; AVX: # BB#0: 79 ; AVX-NEXT: vaddpd %xmm0, %xmm0, %xmm0 80 ; AVX-NEXT: vmovhpd %xmm0, (%rdi) 81 ; AVX-NEXT: retq 82 %a = fadd <2 x double> %x, %x 83 %b = extractelement <2 x double> %a, i32 1 84 %c = bitcast double %b to i64 85 store i64 %c, i64* %p 86 ret void 87 } 88
