1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2 ; RUN: llc < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+avx,+f16c | FileCheck %s --check-prefix=ALL --check-prefix=X32 3 ; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx,+f16c | FileCheck %s --check-prefix=ALL --check-prefix=X64 4 5 ; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/sse3-builtins.c 6 7 define float @test_cvtsh_ss(i16 %a0) nounwind { 8 ; X32-LABEL: test_cvtsh_ss: 9 ; X32: # BB#0: 10 ; X32-NEXT: pushl %eax 11 ; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax 12 ; X32-NEXT: vmovd %eax, %xmm0 13 ; X32-NEXT: vcvtph2ps %xmm0, %xmm0 14 ; X32-NEXT: vmovss %xmm0, (%esp) 15 ; X32-NEXT: flds (%esp) 16 ; X32-NEXT: popl %eax 17 ; X32-NEXT: retl 18 ; 19 ; X64-LABEL: test_cvtsh_ss: 20 ; X64: # BB#0: 21 ; X64-NEXT: movzwl %di, %eax 22 ; X64-NEXT: vmovd %eax, %xmm0 23 ; X64-NEXT: vcvtph2ps %xmm0, %xmm0 24 ; X64-NEXT: retq 25 %ins0 = insertelement <8 x i16> undef, i16 %a0, i32 0 26 %ins1 = insertelement <8 x i16> %ins0, i16 0, i32 1 27 %ins2 = insertelement <8 x i16> %ins1, i16 0, i32 2 28 %ins3 = insertelement <8 x i16> %ins2, i16 0, i32 3 29 %ins4 = insertelement <8 x i16> %ins3, i16 0, i32 4 30 %ins5 = insertelement <8 x i16> %ins4, i16 0, i32 5 31 %ins6 = insertelement <8 x i16> %ins5, i16 0, i32 6 32 %ins7 = insertelement <8 x i16> %ins6, i16 0, i32 7 33 %cvt = call <4 x float> @llvm.x86.vcvtph2ps.128(<8 x i16> %ins7) 34 %res = extractelement <4 x float> %cvt, i32 0 35 ret float %res 36 } 37 38 define i16 @test_cvtss_sh(float %a0) nounwind { 39 ; X32-LABEL: test_cvtss_sh: 40 ; X32: # BB#0: 41 ; X32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero 42 ; X32-NEXT: vxorps %xmm1, %xmm1, %xmm1 43 ; X32-NEXT: vmovss {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3] 44 ; X32-NEXT: vcvtps2ph $0, %xmm0, %xmm0 45 ; X32-NEXT: vmovd %xmm0, %eax 46 ; X32-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill> 47 ; X32-NEXT: retl 48 ; 49 ; X64-LABEL: test_cvtss_sh: 50 ; X64: # BB#0: 51 ; X64-NEXT: vxorps %xmm1, %xmm1, %xmm1 52 ; X64-NEXT: vmovss {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3] 53 ; X64-NEXT: vcvtps2ph $0, %xmm0, %xmm0 54 ; X64-NEXT: vmovd %xmm0, %eax 55 ; X64-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill> 56 ; X64-NEXT: retq 57 %ins0 = insertelement <4 x float> undef, float %a0, i32 0 58 %ins1 = insertelement <4 x float> %ins0, float 0.000000e+00, i32 1 59 %ins2 = insertelement <4 x float> %ins1, float 0.000000e+00, i32 2 60 %ins3 = insertelement <4 x float> %ins2, float 0.000000e+00, i32 3 61 %cvt = call <8 x i16> @llvm.x86.vcvtps2ph.128(<4 x float> %ins3, i32 0) 62 %res = extractelement <8 x i16> %cvt, i32 0 63 ret i16 %res 64 } 65 66 define <4 x float> @test_mm_cvtph_ps(<2 x i64> %a0) nounwind { 67 ; X32-LABEL: test_mm_cvtph_ps: 68 ; X32: # BB#0: 69 ; X32-NEXT: vcvtph2ps %xmm0, %xmm0 70 ; X32-NEXT: retl 71 ; 72 ; X64-LABEL: test_mm_cvtph_ps: 73 ; X64: # BB#0: 74 ; X64-NEXT: vcvtph2ps %xmm0, %xmm0 75 ; X64-NEXT: retq 76 %arg0 = bitcast <2 x i64> %a0 to <8 x i16> 77 %res = call <4 x float> @llvm.x86.vcvtph2ps.128(<8 x i16> %arg0) 78 ret <4 x float> %res 79 } 80 81 define <8 x float> @test_mm256_cvtph_ps(<2 x i64> %a0) nounwind { 82 ; X32-LABEL: test_mm256_cvtph_ps: 83 ; X32: # BB#0: 84 ; X32-NEXT: vcvtph2ps %xmm0, %ymm0 85 ; X32-NEXT: retl 86 ; 87 ; X64-LABEL: test_mm256_cvtph_ps: 88 ; X64: # BB#0: 89 ; X64-NEXT: vcvtph2ps %xmm0, %ymm0 90 ; X64-NEXT: retq 91 %arg0 = bitcast <2 x i64> %a0 to <8 x i16> 92 %res = call <8 x float> @llvm.x86.vcvtph2ps.256(<8 x i16> %arg0) 93 ret <8 x float> %res 94 } 95 96 define <2 x i64> @test_mm_cvtps_ph(<4 x float> %a0) nounwind { 97 ; X32-LABEL: test_mm_cvtps_ph: 98 ; X32: # BB#0: 99 ; X32-NEXT: vcvtps2ph $0, %xmm0, %xmm0 100 ; X32-NEXT: retl 101 ; 102 ; X64-LABEL: test_mm_cvtps_ph: 103 ; X64: # BB#0: 104 ; X64-NEXT: vcvtps2ph $0, %xmm0, %xmm0 105 ; X64-NEXT: retq 106 %cvt = call <8 x i16> @llvm.x86.vcvtps2ph.128(<4 x float> %a0, i32 0) 107 %res = bitcast <8 x i16> %cvt to <2 x i64> 108 ret <2 x i64> %res 109 } 110 111 define <2 x i64> @test_mm256_cvtps_ph(<8 x float> %a0) nounwind { 112 ; X32-LABEL: test_mm256_cvtps_ph: 113 ; X32: # BB#0: 114 ; X32-NEXT: vcvtps2ph $0, %ymm0, %xmm0 115 ; X32-NEXT: vzeroupper 116 ; X32-NEXT: retl 117 ; 118 ; X64-LABEL: test_mm256_cvtps_ph: 119 ; X64: # BB#0: 120 ; X64-NEXT: vcvtps2ph $0, %ymm0, %xmm0 121 ; X64-NEXT: vzeroupper 122 ; X64-NEXT: retq 123 %cvt = call <8 x i16> @llvm.x86.vcvtps2ph.256(<8 x float> %a0, i32 0) 124 %res = bitcast <8 x i16> %cvt to <2 x i64> 125 ret <2 x i64> %res 126 } 127 128 declare <4 x float> @llvm.x86.vcvtph2ps.128(<8 x i16>) nounwind readonly 129 declare <8 x float> @llvm.x86.vcvtph2ps.256(<8 x i16>) nounwind readonly 130 131 declare <8 x i16> @llvm.x86.vcvtps2ph.128(<4 x float>, i32) nounwind readonly 132 declare <8 x i16> @llvm.x86.vcvtps2ph.256(<8 x float>, i32) nounwind readonly 133
