1 ; RUN: llc < %s -mtriple=x86_64-apple-darwin10 | FileCheck %s --check-prefix=CHECK --check-prefix=SDAG 2 ; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=CHECK --check-prefix=FAST 3 4 ; Test all the cmp predicates that can feed an integer conditional move. 5 6 define i64 @select_fcmp_false_cmov(double %a, double %b, i64 %c, i64 %d) { 7 ; CHECK-LABEL: select_fcmp_false_cmov 8 ; CHECK: movq %rsi, %rax 9 ; CHECK-NEXT: retq 10 %1 = fcmp false double %a, %b 11 %2 = select i1 %1, i64 %c, i64 %d 12 ret i64 %2 13 } 14 15 define i64 @select_fcmp_oeq_cmov(double %a, double %b, i64 %c, i64 %d) { 16 ; CHECK-LABEL: select_fcmp_oeq_cmov 17 ; CHECK: ucomisd %xmm1, %xmm0 18 ; SDAG-NEXT: cmovneq %rsi, %rdi 19 ; SDAG-NEXT: cmovpq %rsi, %rdi 20 ; SDAG-NEXT: movq %rdi, %rax 21 ; FAST-NEXT: setnp %al 22 ; FAST-NEXT: sete %cl 23 ; FAST-NEXT: testb %al, %cl 24 ; FAST-NEXT: cmoveq %rsi, %rdi 25 %1 = fcmp oeq double %a, %b 26 %2 = select i1 %1, i64 %c, i64 %d 27 ret i64 %2 28 } 29 30 define i64 @select_fcmp_ogt_cmov(double %a, double %b, i64 %c, i64 %d) { 31 ; CHECK-LABEL: select_fcmp_ogt_cmov 32 ; CHECK: ucomisd %xmm1, %xmm0 33 ; CHECK-NEXT: cmovbeq %rsi, %rdi 34 %1 = fcmp ogt double %a, %b 35 %2 = select i1 %1, i64 %c, i64 %d 36 ret i64 %2 37 } 38 39 define i64 @select_fcmp_oge_cmov(double %a, double %b, i64 %c, i64 %d) { 40 ; CHECK-LABEL: select_fcmp_oge_cmov 41 ; CHECK: ucomisd %xmm1, %xmm0 42 ; CHECK-NEXT: cmovbq %rsi, %rdi 43 %1 = fcmp oge double %a, %b 44 %2 = select i1 %1, i64 %c, i64 %d 45 ret i64 %2 46 } 47 48 define i64 @select_fcmp_olt_cmov(double %a, double %b, i64 %c, i64 %d) { 49 ; CHECK-LABEL: select_fcmp_olt_cmov 50 ; CHECK: ucomisd %xmm0, %xmm1 51 ; CHECK-NEXT: cmovbeq %rsi, %rdi 52 %1 = fcmp olt double %a, %b 53 %2 = select i1 %1, i64 %c, i64 %d 54 ret i64 %2 55 } 56 57 define i64 @select_fcmp_ole_cmov(double %a, double %b, i64 %c, i64 %d) { 58 ; CHECK-LABEL: select_fcmp_ole_cmov 59 ; CHECK: ucomisd %xmm0, %xmm1 60 ; CHECK-NEXT: cmovbq %rsi, %rdi 61 %1 = fcmp ole double %a, %b 62 %2 = select i1 %1, i64 %c, i64 %d 63 ret i64 %2 64 } 65 66 define i64 @select_fcmp_one_cmov(double %a, double %b, i64 %c, i64 %d) { 67 ; CHECK-LABEL: select_fcmp_one_cmov 68 ; CHECK: ucomisd %xmm1, %xmm0 69 ; CHECK-NEXT: cmoveq %rsi, %rdi 70 %1 = fcmp one double %a, %b 71 %2 = select i1 %1, i64 %c, i64 %d 72 ret i64 %2 73 } 74 75 define i64 @select_fcmp_ord_cmov(double %a, double %b, i64 %c, i64 %d) { 76 ; CHECK-LABEL: select_fcmp_ord_cmov 77 ; CHECK: ucomisd %xmm1, %xmm0 78 ; CHECK-NEXT: cmovpq %rsi, %rdi 79 %1 = fcmp ord double %a, %b 80 %2 = select i1 %1, i64 %c, i64 %d 81 ret i64 %2 82 } 83 84 define i64 @select_fcmp_uno_cmov(double %a, double %b, i64 %c, i64 %d) { 85 ; CHECK-LABEL: select_fcmp_uno_cmov 86 ; CHECK: ucomisd %xmm1, %xmm0 87 ; CHECK-NEXT: cmovnpq %rsi, %rdi 88 %1 = fcmp uno double %a, %b 89 %2 = select i1 %1, i64 %c, i64 %d 90 ret i64 %2 91 } 92 93 define i64 @select_fcmp_ueq_cmov(double %a, double %b, i64 %c, i64 %d) { 94 ; CHECK-LABEL: select_fcmp_ueq_cmov 95 ; CHECK: ucomisd %xmm1, %xmm0 96 ; CHECK-NEXT: cmovneq %rsi, %rdi 97 %1 = fcmp ueq double %a, %b 98 %2 = select i1 %1, i64 %c, i64 %d 99 ret i64 %2 100 } 101 102 define i64 @select_fcmp_ugt_cmov(double %a, double %b, i64 %c, i64 %d) { 103 ; CHECK-LABEL: select_fcmp_ugt_cmov 104 ; CHECK: ucomisd %xmm0, %xmm1 105 ; CHECK-NEXT: cmovaeq %rsi, %rdi 106 %1 = fcmp ugt double %a, %b 107 %2 = select i1 %1, i64 %c, i64 %d 108 ret i64 %2 109 } 110 111 define i64 @select_fcmp_uge_cmov(double %a, double %b, i64 %c, i64 %d) { 112 ; CHECK-LABEL: select_fcmp_uge_cmov 113 ; CHECK: ucomisd %xmm0, %xmm1 114 ; CHECK-NEXT: cmovaq %rsi, %rdi 115 %1 = fcmp uge double %a, %b 116 %2 = select i1 %1, i64 %c, i64 %d 117 ret i64 %2 118 } 119 120 define i64 @select_fcmp_ult_cmov(double %a, double %b, i64 %c, i64 %d) { 121 ; CHECK-LABEL: select_fcmp_ult_cmov 122 ; CHECK: ucomisd %xmm1, %xmm0 123 ; CHECK-NEXT: cmovaeq %rsi, %rdi 124 %1 = fcmp ult double %a, %b 125 %2 = select i1 %1, i64 %c, i64 %d 126 ret i64 %2 127 } 128 129 define i64 @select_fcmp_ule_cmov(double %a, double %b, i64 %c, i64 %d) { 130 ; CHECK-LABEL: select_fcmp_ule_cmov 131 ; CHECK: ucomisd %xmm1, %xmm0 132 ; CHECK-NEXT: cmovaq %rsi, %rdi 133 %1 = fcmp ule double %a, %b 134 %2 = select i1 %1, i64 %c, i64 %d 135 ret i64 %2 136 } 137 138 define i64 @select_fcmp_une_cmov(double %a, double %b, i64 %c, i64 %d) { 139 ; CHECK-LABEL: select_fcmp_une_cmov 140 ; CHECK: ucomisd %xmm1, %xmm0 141 ; SDAG-NEXT: cmovneq %rdi, %rsi 142 ; SDAG-NEXT: cmovpq %rdi, %rsi 143 ; SDAG-NEXT: movq %rsi, %rax 144 ; FAST-NEXT: setp %al 145 ; FAST-NEXT: setne %cl 146 ; FAST-NEXT: orb %al, %cl 147 ; FAST-NEXT: cmoveq %rsi, %rdi 148 %1 = fcmp une double %a, %b 149 %2 = select i1 %1, i64 %c, i64 %d 150 ret i64 %2 151 } 152 153 define i64 @select_fcmp_true_cmov(double %a, double %b, i64 %c, i64 %d) { 154 ; CHECK-LABEL: select_fcmp_true_cmov 155 ; CHECK: movq %rdi, %rax 156 %1 = fcmp true double %a, %b 157 %2 = select i1 %1, i64 %c, i64 %d 158 ret i64 %2 159 } 160 161 define i64 @select_icmp_eq_cmov(i64 %a, i64 %b, i64 %c, i64 %d) { 162 ; CHECK-LABEL: select_icmp_eq_cmov 163 ; CHECK: cmpq %rsi, %rdi 164 ; CHECK-NEXT: cmovneq %rcx, %rdx 165 ; CHECK-NEXT: movq %rdx, %rax 166 %1 = icmp eq i64 %a, %b 167 %2 = select i1 %1, i64 %c, i64 %d 168 ret i64 %2 169 } 170 171 define i64 @select_icmp_ne_cmov(i64 %a, i64 %b, i64 %c, i64 %d) { 172 ; CHECK-LABEL: select_icmp_ne_cmov 173 ; CHECK: cmpq %rsi, %rdi 174 ; CHECK-NEXT: cmoveq %rcx, %rdx 175 ; CHECK-NEXT: movq %rdx, %rax 176 %1 = icmp ne i64 %a, %b 177 %2 = select i1 %1, i64 %c, i64 %d 178 ret i64 %2 179 } 180 181 define i64 @select_icmp_ugt_cmov(i64 %a, i64 %b, i64 %c, i64 %d) { 182 ; CHECK-LABEL: select_icmp_ugt_cmov 183 ; CHECK: cmpq %rsi, %rdi 184 ; CHECK-NEXT: cmovbeq %rcx, %rdx 185 ; CHECK-NEXT: movq %rdx, %rax 186 %1 = icmp ugt i64 %a, %b 187 %2 = select i1 %1, i64 %c, i64 %d 188 ret i64 %2 189 } 190 191 192 define i64 @select_icmp_uge_cmov(i64 %a, i64 %b, i64 %c, i64 %d) { 193 ; CHECK-LABEL: select_icmp_uge_cmov 194 ; CHECK: cmpq %rsi, %rdi 195 ; CHECK-NEXT: cmovbq %rcx, %rdx 196 ; CHECK-NEXT: movq %rdx, %rax 197 %1 = icmp uge i64 %a, %b 198 %2 = select i1 %1, i64 %c, i64 %d 199 ret i64 %2 200 } 201 202 define i64 @select_icmp_ult_cmov(i64 %a, i64 %b, i64 %c, i64 %d) { 203 ; CHECK-LABEL: select_icmp_ult_cmov 204 ; CHECK: cmpq %rsi, %rdi 205 ; CHECK-NEXT: cmovaeq %rcx, %rdx 206 ; CHECK-NEXT: movq %rdx, %rax 207 %1 = icmp ult i64 %a, %b 208 %2 = select i1 %1, i64 %c, i64 %d 209 ret i64 %2 210 } 211 212 define i64 @select_icmp_ule_cmov(i64 %a, i64 %b, i64 %c, i64 %d) { 213 ; CHECK-LABEL: select_icmp_ule_cmov 214 ; CHECK: cmpq %rsi, %rdi 215 ; CHECK-NEXT: cmovaq %rcx, %rdx 216 ; CHECK-NEXT: movq %rdx, %rax 217 %1 = icmp ule i64 %a, %b 218 %2 = select i1 %1, i64 %c, i64 %d 219 ret i64 %2 220 } 221 222 define i64 @select_icmp_sgt_cmov(i64 %a, i64 %b, i64 %c, i64 %d) { 223 ; CHECK-LABEL: select_icmp_sgt_cmov 224 ; CHECK: cmpq %rsi, %rdi 225 ; CHECK-NEXT: cmovleq %rcx, %rdx 226 ; CHECK-NEXT: movq %rdx, %rax 227 %1 = icmp sgt i64 %a, %b 228 %2 = select i1 %1, i64 %c, i64 %d 229 ret i64 %2 230 } 231 232 define i64 @select_icmp_sge_cmov(i64 %a, i64 %b, i64 %c, i64 %d) { 233 ; CHECK-LABEL: select_icmp_sge_cmov 234 ; CHECK: cmpq %rsi, %rdi 235 ; CHECK-NEXT: cmovlq %rcx, %rdx 236 ; CHECK-NEXT: movq %rdx, %rax 237 %1 = icmp sge i64 %a, %b 238 %2 = select i1 %1, i64 %c, i64 %d 239 ret i64 %2 240 } 241 242 define i64 @select_icmp_slt_cmov(i64 %a, i64 %b, i64 %c, i64 %d) { 243 ; CHECK-LABEL: select_icmp_slt_cmov 244 ; CHECK: cmpq %rsi, %rdi 245 ; CHECK-NEXT: cmovgeq %rcx, %rdx 246 ; CHECK-NEXT: movq %rdx, %rax 247 %1 = icmp slt i64 %a, %b 248 %2 = select i1 %1, i64 %c, i64 %d 249 ret i64 %2 250 } 251 252 define i64 @select_icmp_sle_cmov(i64 %a, i64 %b, i64 %c, i64 %d) { 253 ; CHECK-LABEL: select_icmp_sle_cmov 254 ; CHECK: cmpq %rsi, %rdi 255 ; CHECK-NEXT: cmovgq %rcx, %rdx 256 ; CHECK-NEXT: movq %rdx, %rax 257 %1 = icmp sle i64 %a, %b 258 %2 = select i1 %1, i64 %c, i64 %d 259 ret i64 %2 260 } 261 262
