1 ; RUN: llc -O0 < %s -verify-machineinstrs 2 ; RUN: llc < %s -verify-machineinstrs 3 target triple = "x86_64-apple-macosx10.7" 4 5 ; This test case extracts a sub_8bit_hi sub-register: 6 ; 7 ; %R8B<def> = COPY %BH, %EBX<imp-use,kill> 8 ; %ESI<def> = MOVZX32_NOREXrr8 %R8B<kill> 9 ; 10 ; The register allocation above is invalid, %BH can only be encoded without an 11 ; REX prefix, so the destination register must be GR8_NOREX. The code above 12 ; triggers an assertion in copyPhysReg. 13 ; 14 ; <rdar://problem/10248099> 15 16 define void @f() nounwind uwtable ssp { 17 entry: 18 %0 = load i32, i32* undef, align 4 19 %add = add i32 0, %0 20 %conv1 = trunc i32 %add to i16 21 %bf.value = and i16 %conv1, 255 22 %1 = and i16 %bf.value, 255 23 %2 = shl i16 %1, 8 24 %3 = load i16, i16* undef, align 1 25 %4 = and i16 %3, 255 26 %5 = or i16 %4, %2 27 store i16 %5, i16* undef, align 1 28 %6 = load i16, i16* undef, align 1 29 %7 = lshr i16 %6, 8 30 %bf.clear2 = and i16 %7, 255 31 %conv3 = zext i16 %bf.clear2 to i32 32 %rem = srem i32 %conv3, 15 33 %conv4 = trunc i32 %rem to i16 34 %bf.value5 = and i16 %conv4, 255 35 %8 = and i16 %bf.value5, 255 36 %9 = shl i16 %8, 8 37 %10 = or i16 undef, %9 38 store i16 %10, i16* undef, align 1 39 ret void 40 } 41 42 ; This test case extracts a sub_8bit_hi sub-register: 43 ; 44 ; %vreg2<def> = COPY %vreg1:sub_8bit_hi; GR8:%vreg2 GR64_ABCD:%vreg1 45 ; TEST8ri %vreg2, 1, %EFLAGS<imp-def>; GR8:%vreg2 46 ; 47 ; %vreg2 must be constrained to GR8_NOREX, or the COPY could become impossible. 48 ; 49 ; PR11088 50 51 define fastcc i32 @g(i64 %FB) nounwind uwtable readnone align 2 { 52 entry: 53 %and32 = and i64 %FB, 256 54 %cmp33 = icmp eq i64 %and32, 0 55 %Features.6.or35 = select i1 %cmp33, i32 0, i32 undef 56 %cmp38 = icmp eq i64 undef, 0 57 %or40 = or i32 %Features.6.or35, 4 58 %Features.8 = select i1 %cmp38, i32 %Features.6.or35, i32 %or40 59 %and42 = and i64 %FB, 32 60 %or45 = or i32 %Features.8, 2 61 %cmp43 = icmp eq i64 %and42, 0 62 %Features.8.or45 = select i1 %cmp43, i32 %Features.8, i32 %or45 63 %and47 = and i64 %FB, 8192 64 %cmp48 = icmp eq i64 %and47, 0 65 %or50 = or i32 %Features.8.or45, 32 66 %Features.10 = select i1 %cmp48, i32 %Features.8.or45, i32 %or50 67 %or55 = or i32 %Features.10, 64 68 %Features.10.or55 = select i1 undef, i32 %Features.10, i32 %or55 69 %and57 = lshr i64 %FB, 2 70 %and57.tr = trunc i64 %and57 to i32 71 %or60 = and i32 %and57.tr, 1 72 %Features.12 = or i32 %Features.10.or55, %or60 73 %and62 = and i64 %FB, 128 74 %or65 = or i32 %Features.12, 8 75 %cmp63 = icmp eq i64 %and62, 0 76 %Features.12.or65 = select i1 %cmp63, i32 %Features.12, i32 %or65 77 %Features.14 = select i1 undef, i32 undef, i32 %Features.12.or65 78 %Features.16 = select i1 undef, i32 undef, i32 %Features.14 79 ret i32 %Features.16 80 } 81
