1 ; RUN: llc < %s -stack-symbol-ordering=0 -march=x86 -mtriple=i386-apple-darwin9 -mcpu=generic -regalloc=fast -optimize-regalloc=0 -no-x86-call-frame-opt | FileCheck %s 2 ; RUN: llc -O0 < %s -stack-symbol-ordering=0 -march=x86 -mtriple=i386-apple-darwin9 -mcpu=generic -regalloc=fast -no-x86-call-frame-opt | FileCheck %s 3 ; RUN: llc < %s -stack-symbol-ordering=0 -march=x86 -mtriple=i386-apple-darwin9 -mcpu=atom -regalloc=fast -optimize-regalloc=0 -no-x86-call-frame-opt | FileCheck -check-prefix=ATOM %s 4 ; CHECKed instructions should be the same with or without -O0 except on Intel Atom due to instruction scheduling. 5 6 @.str = private constant [12 x i8] c"x + y = %i\0A\00", align 1 ; <[12 x i8]*> [#uses=1] 7 8 define i32 @main() nounwind { 9 entry: 10 ; CHECK: movl 24(%esp), %eax 11 ; CHECK-NOT: movl 12 ; CHECK: movl %eax, 36(%esp) 13 ; CHECK-NOT: movl 14 ; CHECK: movl 28(%esp), %ebx 15 ; CHECK-NOT: movl 16 ; CHECK: movl %ebx, 40(%esp) 17 ; CHECK-NOT: movl 18 ; CHECK: addl %ebx, %eax 19 20 ; On Intel Atom the scheduler moves a movl instruction 21 ; used for the printf call to follow movl 24(%esp), %eax 22 ; ATOM: movl 24(%esp), %eax 23 ; ATOM: movl 24 ; ATOM: movl %eax, 36(%esp) 25 ; ATOM-NOT: movl 26 ; ATOM: movl 28(%esp), %ebx 27 ; ATOM-NOT: movl 28 ; ATOM: movl %ebx, 40(%esp) 29 ; ATOM-NOT: movl 30 ; ATOM: addl %ebx, %eax 31 32 %retval = alloca i32 ; <i32*> [#uses=2] 33 %"%ebx" = alloca i32 ; <i32*> [#uses=1] 34 %"%eax" = alloca i32 ; <i32*> [#uses=2] 35 %result = alloca i32 ; <i32*> [#uses=2] 36 %y = alloca i32 ; <i32*> [#uses=2] 37 %x = alloca i32 ; <i32*> [#uses=2] 38 %0 = alloca i32 ; <i32*> [#uses=2] 39 %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] 40 store i32 1, i32* %x, align 4 41 store i32 2, i32* %y, align 4 42 call void asm sideeffect alignstack "# top of block", "~{dirflag},~{fpsr},~{flags},~{edi},~{esi},~{edx},~{ecx},~{eax}"() nounwind 43 %asmtmp = call i32 asm sideeffect alignstack "movl $1, $0", "=={eax},*m,~{dirflag},~{fpsr},~{flags},~{memory}"(i32* %x) nounwind ; <i32> [#uses=1] 44 store i32 %asmtmp, i32* %"%eax" 45 %asmtmp1 = call i32 asm sideeffect alignstack "movl $1, $0", "=={ebx},*m,~{dirflag},~{fpsr},~{flags},~{memory}"(i32* %y) nounwind ; <i32> [#uses=1] 46 store i32 %asmtmp1, i32* %"%ebx" 47 %1 = call i32 asm "", "={bx}"() nounwind ; <i32> [#uses=1] 48 %2 = call i32 asm "", "={ax}"() nounwind ; <i32> [#uses=1] 49 %asmtmp2 = call i32 asm sideeffect alignstack "addl $1, $0", "=={eax},{ebx},{eax},~{dirflag},~{fpsr},~{flags},~{memory}"(i32 %1, i32 %2) nounwind ; <i32> [#uses=1] 50 store i32 %asmtmp2, i32* %"%eax" 51 %3 = call i32 asm "", "={ax}"() nounwind ; <i32> [#uses=1] 52 call void asm sideeffect alignstack "movl $0, $1", "{eax},*m,~{dirflag},~{fpsr},~{flags},~{memory}"(i32 %3, i32* %result) nounwind 53 %4 = load i32, i32* %result, align 4 ; <i32> [#uses=1] 54 %5 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i32 0, i32 0), i32 %4) nounwind ; <i32> [#uses=0] 55 store i32 0, i32* %0, align 4 56 %6 = load i32, i32* %0, align 4 ; <i32> [#uses=1] 57 store i32 %6, i32* %retval, align 4 58 br label %return 59 60 return: ; preds = %entry 61 %retval3 = load i32, i32* %retval ; <i32> [#uses=1] 62 ret i32 %retval3 63 } 64 65 declare i32 @printf(i8*, ...) nounwind 66
