1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2 ; RUN: llc < %s -mtriple=i386-unknown-unknown | FileCheck %s 3 4 define i32 @test1(i32 %X) { 5 ; CHECK-LABEL: test1: 6 ; CHECK: # BB#0: 7 ; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx 8 ; CHECK-NEXT: movl $-2139062143, %edx # imm = 0x80808081 9 ; CHECK-NEXT: movl %ecx, %eax 10 ; CHECK-NEXT: imull %edx 11 ; CHECK-NEXT: addl %ecx, %edx 12 ; CHECK-NEXT: movl %edx, %eax 13 ; CHECK-NEXT: shrl $31, %eax 14 ; CHECK-NEXT: sarl $7, %edx 15 ; CHECK-NEXT: addl %eax, %edx 16 ; CHECK-NEXT: movl %edx, %eax 17 ; CHECK-NEXT: shll $8, %eax 18 ; CHECK-NEXT: subl %edx, %eax 19 ; CHECK-NEXT: subl %eax, %ecx 20 ; CHECK-NEXT: movl %ecx, %eax 21 ; CHECK-NEXT: retl 22 ; 23 %tmp1 = srem i32 %X, 255 24 ret i32 %tmp1 25 } 26 27 define i32 @test2(i32 %X) { 28 ; CHECK-LABEL: test2: 29 ; CHECK: # BB#0: 30 ; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax 31 ; CHECK-NEXT: movl %eax, %ecx 32 ; CHECK-NEXT: sarl $31, %ecx 33 ; CHECK-NEXT: shrl $24, %ecx 34 ; CHECK-NEXT: addl %eax, %ecx 35 ; CHECK-NEXT: andl $-256, %ecx 36 ; CHECK-NEXT: subl %ecx, %eax 37 ; CHECK-NEXT: retl 38 ; 39 %tmp1 = srem i32 %X, 256 40 ret i32 %tmp1 41 } 42 43 define i32 @test3(i32 %X) { 44 ; CHECK-LABEL: test3: 45 ; CHECK: # BB#0: 46 ; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx 47 ; CHECK-NEXT: movl $-2139062143, %edx # imm = 0x80808081 48 ; CHECK-NEXT: movl %ecx, %eax 49 ; CHECK-NEXT: mull %edx 50 ; CHECK-NEXT: shrl $7, %edx 51 ; CHECK-NEXT: movl %edx, %eax 52 ; CHECK-NEXT: shll $8, %eax 53 ; CHECK-NEXT: subl %edx, %eax 54 ; CHECK-NEXT: subl %eax, %ecx 55 ; CHECK-NEXT: movl %ecx, %eax 56 ; CHECK-NEXT: retl 57 ; 58 %tmp1 = urem i32 %X, 255 59 ret i32 %tmp1 60 } 61 62 define i32 @test4(i32 %X) { 63 ; CHECK-LABEL: test4: 64 ; CHECK: # BB#0: 65 ; CHECK-NEXT: movzbl {{[0-9]+}}(%esp), %eax 66 ; CHECK-NEXT: retl 67 ; 68 %tmp1 = urem i32 %X, 256 69 ret i32 %tmp1 70 } 71 72 define i32 @test5(i32 %X) nounwind readnone { 73 ; CHECK-LABEL: test5: 74 ; CHECK: # BB#0: # %entry 75 ; CHECK-NEXT: movl $41, %eax 76 ; CHECK-NEXT: xorl %edx, %edx 77 ; CHECK-NEXT: idivl {{[0-9]+}}(%esp) 78 ; CHECK-NEXT: movl %edx, %eax 79 ; CHECK-NEXT: retl 80 ; 81 entry: 82 %0 = srem i32 41, %X 83 ret i32 %0 84 } 85
